Pattern generator

Abstract

The invention is a kind of graph generator, which is used in exposure machine of electron bundle and ion beam. The invention uses high speed digital signal processor as core, and realizes the communication through universal series bus interface and the superior machine, the generator provides not only the exposure format used triangle, rectangular and trapeze, but also increases circle and ring base exposure graph. The invention comprises interface circuit, double-port memory circuit, digital signal processor circuit, D / A conversion circuit, exposure / marking test control circuit, marking test control circuit, terminal exposure data register unit and brake control circuit.

Description

technical field [0001] The present invention relates to the control equipment of all charged particle exposure machines such as electron beams and ion beams. Specifically, the present invention belongs to the hardware of the pattern generator of the exposure machine, especially the pattern generator used in the electron beam exposure machine. Background technique [0002] Electron beam exposure system is an indispensable large-scale precision equipment for the research and development of microelectronics industry and other microfabrication. The pattern generator is a key component in this system. It is located between the computer and the high-precision deflection amplifier. Its main function is to process the unit graphic data sent by the computer, and the hardware unit in the graphic generator will sequentially generate the X and Y coordinate values ​​of each point to be exposed. These values ​​are then converted into corresponding analog quantities through a high-speed, ...

AI Technical Summary

Problems solved by technology

The device has the following deficiencies: first, the controller uses a traditional small computer with limited data storage and slow processing speed; a large-capacity storage device is used, resulting in high equipment cost; the device is very complicated in terms of interface, involving Interface methods such as SCSI interface, VSB interface and VME interface; graphics processing is mainly realized by FPGA unit, which has defects in processing speed and expansion performance; the patent does not explain how to realize the functions of exposure scanning and mark alignment

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