Voltage stabilizer capable of dynamically adjusting bias current according to load frequency and output voltage

A technology of bias current and output voltage, which is applied in the direction of instruments, adjusting electrical variables, control/regulation systems, etc., can solve the problem of high power consumption of LDO, and achieve the effect of saving power consumption and avoiding voltage drop

Active Publication Date: 2015-06-10
XI AN UNIIC SEMICON CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the technical problem of high power consumption of the existing low dropout

Method used

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  • Voltage stabilizer capable of dynamically adjusting bias current according to load frequency and output voltage
  • Voltage stabilizer capable of dynamically adjusting bias current according to load frequency and output voltage
  • Voltage stabilizer capable of dynamically adjusting bias current according to load frequency and output voltage

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Example Embodiment

[0030] The present invention adds a part of the circuit 20 on the original basis. The part of the circuit 20 includes a frequency detection circuit, an output voltage detection circuit and a bias current generation circuit.

[0031] The frequency detection circuit detects the frequency of the load digital circuit, and generates a current according to the frequency. The higher the operating frequency of the digital circuit, the greater the current generated; the lower the operating frequency of the load digital circuit, the smaller the generated current.

[0032] The output voltage detection circuit detects the output voltage of the LDO and generates a current according to the level of the output voltage. The smaller the value of the output voltage, the larger the current generated; the larger the value of the output voltage, the smaller the generated current.

[0033] The bias current generation circuit generates a bias current according to the magnitude of the input current....

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Abstract

The invention relates to a voltage stabilizer capable of dynamically adjusting bias current according to load frequency and output voltage. The voltage stabilizer comprises a band-gap reference, an operational amplifier, a feedback resistor string and a power tube, the band-gap reference is used for generating reference voltage Vref and inputting the same to a reverse input end of the operational amplifier, the feedback resistor string is connected with a forward input end of the operational amplifier and comprises a resistor R1 and a resistor R2 which are serially connected sequentially, one end of the resistor R1 is connected with a drain end of the power tube, the other end of the resistor R2 is grounded, a source end of the power tube is connected with a VDD power source while a grid end of the same is connected with an output end of the operational amplifier, and the voltage stabilizer further comprises a frequency detection circuit, a bias current generating circuit and an output voltage detection circuit. The voltage stabilizer is adopted to solve the technical problem that existing low dropout regulators LDO are high in power consumption; when frequency of a load digital circuit is high, overlarge voltage drop of the LDOs can be avoided.

Description

technical field [0001] The invention relates to a voltage stabilizer for dynamically adjusting bias current according to load frequency and output voltage. Background technique [0002] A general low-dropout linear regulator (LDO) consists of a bandgap reference, an operational amplifier, a feedback resistor string, and a power tube. The bandgap reference generates the reference voltage Vref for comparison; the feedback resistor string determines the feedback coefficient; the gate voltage of the power tube of the operational amplifier, [0003] Let the feedback voltage Vfb=Vref=Vout*R2 / (R1+R2). [0004] Therefore, the output voltage Vout of the LDO=Vref*(R1+R2) / R2. By increasing the quiescent current Iq of the operational amplifier to improve the response speed of the LDO, thereby reducing the voltage drop and overshoot of the LDO output, and speeding up the recovery speed of the LDO output voltage. Although this method can avoid the large voltage drop and large overshoot...

Claims

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Application Information

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IPC IPC(8): G05F1/56
Inventor 成俊
Owner XI AN UNIIC SEMICON CO LTD
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