Non-overlapped clock signal producing circuit

Abstract

The invention relates to a non-overlapped clock signal producing circuit which delays a main clock signal to generate a delayed clock signal by means of a delay unit and produces a multi-phase non-overlapped clock by means of devices such as a NAND gate and / or a NOR gate. The circuit has the characteristics of being simple in structure, low in power consumption, small in occupied area, high in reliability and programmable and the like.

Description

Technical field [0001] The invention relates to a signal generating circuit, in particular to a multi-phase non-overlapping clock signal generating circuit. Background technique [0002] In circuits such as switched capacitors and charge pumps, an indispensable unit is a non-overlapping clock signal generating circuit. The function of the non-overlapping clock signal generating circuit is to generate non-overlapping clock signals to prevent the switches controlled by the clock signals from being turned on at the same time, and because one phase clock is turned off earlier than the other phase, the impact of the charge injection effect of the switch is reduced . The current non-overlapping clock signal generating circuit has defects such as relatively complex structure, high power consumption, large occupied area, and low reliability. Summary of the invention [0003] In order to solve the above problems, the present invention proposes a multi-phase non-overlapping clock signal g...

AI Technical Summary

Problems solved by technology

The current non-overlapping clock signal generation circuit has defects such as relatively complex structure, high power consumption, large occupied area, and low reliability.

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