Unlock instant, AI-driven research and patent intelligence for your innovation.

Dual-port SRAM structure with read-write separation and its unit

A technology of structure unit, read and write separation, applied in information storage, static memory, digital memory information and other directions, to achieve the effect of improving area utilization, reducing area and reducing resistance

Active Publication Date: 2018-03-09
SEMICON MFG INT (SHANGHAI) CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] What the present invention solves is to improve the read current of existing read-write separation dual-port SRAM

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Dual-port SRAM structure with read-write separation and its unit
  • Dual-port SRAM structure with read-write separation and its unit
  • Dual-port SRAM structure with read-write separation and its unit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] As mentioned in the background art, the read current of the existing read-write split dual-port SRAM structure is relatively small. In view of the above technical problems, the present invention replaces the read pass transistor and read pull-down NMOS transistor in the prior art with a read transistor, which not only reduces the resistance of the read process, increases the read current, but also reduces the area. The area utilization rate of the SRAM structure is improved.

[0030] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0031] figure 2 Shown is the circuit diagram of the dual-port SRAM structural unit provided by the embodiment of the present invention, image 3 Yes figure 2 A top view of an integrated circuit layout of a middle circuit. refer to figure 2 and im...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A dual-port SRAM structure with read-write separation and its unit. Wherein, the SRAM unit includes: a coupled first inverter and a second inverter, the first inverter has a first storage node, and the second inverter has a second storage node; and A first transfer transistor connected to the first storage node, a second transfer transistor connected to the second storage node; a read transistor connected to the first storage node or the second storage node. By replacing the read pass transistor and read pull-down NMOS transistor in the prior art with a read transistor, not only the resistance of the read process is reduced, the read current is increased, the area is also reduced, and the area utilization of the SRAM structure is improved. Rate.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a dual-port SRAM structure with read-write separation and a unit thereof. Background technique [0002] Static random access memory (SRAM) is embedded in almost all large-scale integration (VLSI) and plays a key role in applications requiring high speed, high integration, low power consumption, low voltage, low cost, and short cycle time role. Embedded SRAM dominates high-end applications because it provides faster access speeds than other embedded semiconductor memories such as dynamic random access memory (DRAM). [0003] Static noise margin (SNM) is one of the parameters for evaluating SRAM memory cells. It refers to the amplitude of the maximum DC noise signal that the memory cell can withstand. If it exceeds this value, the data of the memory node will be wrongly reversed. It It is an important parameter to measure the anti-interference ability of the storage u...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/419
Inventor 王颖倩李煜王媛王楠
Owner SEMICON MFG INT (SHANGHAI) CORP