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Latch resistant to single-particle multi-node overturning

An anti-single event, latch technology, applied in the field of integrated circuit design, anti-irradiation hardening design, can solve the problem of relying on layout design, and achieve the effect of improving reliability

Inactive Publication Date: 2015-09-09
HEFEI UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although TPDICE has the ability to resist single-event multi-node flipping, it relies on layout design and does not completely solve the problem of double-node flipping at the circuit design level.

Method used

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  • Latch resistant to single-particle multi-node overturning
  • Latch resistant to single-particle multi-node overturning
  • Latch resistant to single-particle multi-node overturning

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Embodiment Construction

[0018] In order to make the object, technical solution and beneficial effects of the present invention more clear, the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described below are only used to explain the present invention, not to limit the present invention.

[0019] Figure 1a , Figure 1bAs shown, the anti-single event multi-node flipping latch includes six transmission gates, six CWSP units and a voter 3, and also includes a data input terminal D, a data output terminal Q and two clock signal input terminals; two The first clock signal input terminal CLK and the second clock signal input terminal CLKB successively input two clocks with opposite phases; the six transmission gates are the first transmission gate 11 and the second transmission gate successively. 12. The third transmission gate 13, the fourth transmission gate 14, the fifth transmission gate 15 and ...

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Abstract

The invention discloses a latch resistant to single-particle multi-node overturning. The latch comprises six transmission gates, six CWSP units and a voter, wherein the six CWSP units are in highly-redundant states; when any two node are overturned logically under the influences of single particles, a part of the CWSP units enter hold modes to avoid the influence of logical overturning on the outputs of the CWSP units; the other part of the CWSP units restore the influenced nodes to correct logical states; and the voter is taken as an output stage by the latch, so that the interference of influenced internal nodes on output nodes can be eliminated. Through adoption of the latch, the problem of multi-node overturning caused by single particles is solved independent of a layout design, and the reliability of the latch is enhanced greatly. The latch is suitable for a high-reliability integrated circuit system, and can be applied to the fields of aerospace, aviation and the like.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to the field of anti-radiation reinforcement design of integrated circuits, in particular to a single-event multi-node flip-resistant latch. Background technique [0002] In the space radiation environment, there are a large number of high-energy particles (protons, alpha particles, etc.), which is an important reason that threatens the reliability of aerospace electronic equipment. When a single radiation particle passes through the silicon wafer, it will ionize on the traveling path to generate a large number of electron-hole pairs. If these electron-hole pairs are located in the reverse biased PN junction, charge collection will occur, forming a transient The interference current of the state causes the logic state of the circuit node to change. This phenomenon is called single event effect, which is the main cause of soft errors in integrated circuits and seriously affe...

Claims

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Application Information

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IPC IPC(8): H03K19/003
Inventor 黄正峰钱栋良倪涛梁华国欧阳一鸣易茂祥鲁迎春闫爱斌
Owner HEFEI UNIV OF TECH