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Novel Mask Removal Method Strategy for Vertical NAND Devices

A mask and substrate technology, applied in the field of mask material removal, can solve the problem of low removal rate

Active Publication Date: 2017-11-14
베이징이타운세미컨덕터테크놀로지컴퍼니리미티드 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with conventional lift-off processes, mask removal rates for DaC films have been less than about 500 Angstroms / minute, which is much lower than what can be achieved for conventional amorphous carbon films using conventional lift-off processes.

Method used

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  • Novel Mask Removal Method Strategy for Vertical NAND Devices
  • Novel Mask Removal Method Strategy for Vertical NAND Devices
  • Novel Mask Removal Method Strategy for Vertical NAND Devices

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0050] Example 1 reference Figure 4 to Figure 8 . Fifteen SONOS substrates containing a boron-doped amorphous carbon mask layer were placed in the processing chamber, after which each substrate was processed using a plasma formed in the plasma generation chamber. The plasma used to treat the substrate includes O 2 、CF 4 and H 2 gas. To understand the effect of different processing conditions on the etch rates of boron-doped amorphous carbon (BDaC) layers, silicon nitride and silicon dioxide, the CF 4 The percentage of H is adjusted to 1%, 1.5% or 2% of the total gas volume, and the H 2 Percentage of Gas vs. CF 4 The gas percentage scale is adjusted to 0.5, 1, 2, 3 or 4. Then, the etching rate of the BDaC layer, the etching rate of silicon nitride, and the etching rate of silicon dioxide were measured. Next, BDaC selectivity to silicon nitride and BDaC selectivity to silicon dioxide were calculated for each process condition. The result is in Figure 4 to Figure 8 sh...

Embodiment 2

[0056] As shown in Example 1, while the plasma chemistry of the present disclosure can increase the BDaC etch rate, it can also cause etching of silicon nitride and silicon dioxide, possibly resulting in loss of Formation of pinholes or other defects in the substrate film. The effects of the preprocessing and postprocessing steps discussed above are in Figure 9 shown in . Specifically, O 2 / H 2 / CF 4 Gas mixture for 300 seconds; use O for substrates that have been treated with base / control and post-treatment gases 2 / H 2 / CF 4 The gas mixture was treated for 300 s, followed by N 2 / H 2 Gas mixture treatment for 60 seconds; use O for substrates treated with pretreatment gas and base / control gas 2 Process for 60 seconds, then use O 2 / H 2 / CF 4 The gas mixture was treated for 300 seconds; and O 2 Process for 30 seconds, use O 2 / H 2 / CF 4 Process for 300 seconds, and with N 2 / H 2 Process for 30 seconds. The number of pinholes found on each substrate (silicon...

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Abstract

A method for removing a doped amorphous carbon mask from a semiconductor substrate is disclosed. The method includes generating a plasma to be used in processing a substrate, wherein the plasma includes an oxygen-containing gas, a halogen-containing gas, and a hydrogen-containing gas; and processing the substrate by exposing the substrate to the plasma. The doped amorphous carbon mask may be a boron doped amorphous carbon mask or a nitrogen doped amorphous carbon mask. The method is capable of producing a mask removal rate in the range of about 1000 Angstroms / minute to about 12000 Angstroms / minute. In addition, a gas may be applied to the substrate before plasma treatment, after plasma treatment, or both before and after plasma treatment to reduce the number of defects or pinholes found in the substrate film.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Application Serial No. 61 / 900,425, filed November 6, 2013, the entire contents of which are incorporated herein by reference. technical field [0003] The present disclosure relates generally to masking material removal and, more particularly, to methods capable of removing masking material from semiconductor devices, such as NAND devices. Background technique [0004] In the semiconductor industry, NAND flash memory device development aims to increase bit density while reducing bit cost. Recently, there has been increased interest in the use of vertical NAND flash memory cell arrays utilizing Terabit Cell Array Transistor (TCAT) technology due to its Capabilities for various advantages of silicon (SONOS) cell structures. Such advantages include faster erase speed, wider Vth range, and improved retention characteristics. With the SONOS structure, there can be more t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8247H01L21/205
CPCH01J37/321H01J37/32357H01J37/32422H01L21/31122H01L21/31144H10B43/00H01L21/02315H01L21/0234H01L21/308H01L21/76856H01L2924/01008H01L2924/01001H01L2924/01111H10B41/35
Inventor 刁丽海奥·攀武维贾伊·马修·瓦尼亚普拉
Owner 베이징이타운세미컨덕터테크놀로지컴퍼니리미티드