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A fpga configuration system and method for integrated circuit testing

A technology for integrated circuits and configuration systems, which is applied in the direction of electronic circuit testing, measuring devices, and measuring electronics, and can solve problems such as multiple configuration files with different hardware structures

Active Publication Date: 2017-11-10
北京华峰装备技术有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to propose a FPGA configuration system and method for integrated circuit testing. By using a memory module to solve the test of different integrated circuit varieties, it is necessary to use multiple configuration files with different boards with the same hardware structure or to use high-level Performance FPGA Issues

Method used

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  • A fpga configuration system and method for integrated circuit testing
  • A fpga configuration system and method for integrated circuit testing

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Embodiment 1

[0027] An FPGA configuration system for integrated circuit testing, such as figure 1 As shown, it includes a general control module, a general test circuit containing FPGA (programmable logic device) and an interface circuit of the integrated circuit to be tested. The general control module controls and connects the general test circuit containing FPGA. The general control module (equivalent to a control computer) is The known module of test equipment is used to control the general test circuit that contains FPGA at present; Described test circuit and the integrated circuit interface circuit to be tested are divided into two boards, are respectively the general test board that contains FPGA and adapter board, described The interface circuit of the integrated circuit to be tested is set on the adapter board; one or more configuration memories (such as figure 1 N configuration memories in the configuration memory), a path switching module is provided between the general test boa...

Embodiment 2

[0035]An integrated circuit testing method based on the configuration system described in Embodiment 1, therefore, the content in Embodiment 1 should also be considered as the content of this embodiment, wherein: the configuration system includes a general control module, a general-purpose A test board and an adapter board, the adapter board is provided with an integrated circuit interface circuit to be tested; the adapter board is also provided with a plurality of memories corresponding to different test schemes for the interface configuration of the integrated circuit to be tested. A path switch module is set between the test board and the adapter board, and the path switch module is provided with multiple clock signal paths and multiple data signal paths for multiple memories; the reconfiguration start signal sent by the general control The nCONFIG pins of the FPGA on the test board are connected; the method is: at first the general control module outputs the path switching ...

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Abstract

The invention discloses an FPGA configuration system and method for integrated circuit testing. The system includes a general control module, a general test board containing FPGA and an adapter board. The adapter board is provided with an interface corresponding to the integrated circuit to be tested. Configure multiple memories of different test schemes, and a path switching module is arranged between the universal test board and the adapter board; the method is: firstly configure different test programs for different integrated circuits to multiple memories, and then directly call the test program. Program startup test; the present invention designs the universal test board and the adapter board to be connectable and detachable; and places the configuration memory and the integrated circuit under test on the adapter board. It solves the problem that the number of hardware boards needs to be increased or the use of high-performance FPGA leads to an increase in hardware cost in integrated circuit testing, and solves the problem that the transmission rate of the communication bus is limited when the computer dynamically configures the FPGA.

Description

technical field [0001] The invention belongs to the field of integrated circuit testing, in particular to an FPGA configuration system and method for integrated circuit testing. Background technique [0002] Complex integrated circuit tests such as ADC and DAC converters have the characteristics of many test varieties and test parameters. In modern mixed-signal test systems, FPGAs are often used to realize the control of complex digital logic. Usually, different test boards need to be used for different test varieties to adapt to different packages, different pin arrangements and different control timings. In some cases, different test varieties can be developed using the same hardware board, but due to the different control timing, different FPGA configuration files need to be loaded, resulting in the need to use multiple hardware boards, which is largely Increased hardware costs. At the same time, some integrated circuit tests require more FPGA resources, so it is imposs...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28G01R31/3185
Inventor 李泳明袁琰陈良
Owner 北京华峰装备技术有限公司