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Space allocation based wear leveling method for nonvolatile memory

A non-volatile memory and wear leveling technology, applied in the direction of memory address/allocation/relocation, etc., can solve the problems of huge write overhead and operation overhead, limit the practical application of phase change memory PCM, etc., and achieve fine-grained, good The effect of wear leveling and low storage overhead

Active Publication Date: 2015-11-11
CHONGQING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the high switching frequency, huge write overhead and running overhead may occur, and most of them require hardware and operating system support, thus limiting the practical application of phase change memory PCM in embedded systems

Method used

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  • Space allocation based wear leveling method for nonvolatile memory
  • Space allocation based wear leveling method for nonvolatile memory
  • Space allocation based wear leveling method for nonvolatile memory

Examples

Experimental program
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Embodiment Construction

[0014] The present invention will be further described below in conjunction with the accompanying drawings and the phase change memory as an embodiment:

[0015] The present invention proposes a space allocation method. The space allocation method is to expand each variable into array spaces of different sizes, so that the amount of write operation at one position can be evenly expanded to multiple positions, thereby obtaining a phase change memory. Balanced distribution of write operations.

[0016] Such as figure 1 As shown, (a) is a schematic diagram of a standard variable being expanded into an array, and (b) is a schematic diagram of a one-dimensional array being expanded into a two-dimensional array, so that a large amount of write operations at one location is spread to multiple spaces . (c) is a schematic diagram of variables having n*w write operations in storage unit 1, and (d) is that n*w write operations are evenly spread to n units, and each unit is only written...

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Abstract

The present invention discloses a space allocation based wear leveling method for a nonvolatile memory. The method comprises the following steps of: 1. making statistics on the number of write operations of each variable and the dimension of the variable; 2. allocating an appropriate space dimension for each variable according to the unoccupied space dimension to enable the maximum number of the write operations in a nonvolatile memory to be reduced as far as possible; and 3. executing a recompiled program in an embedded system to realize wear leveling of the nonvolatile memory. The space allocation based wear leveling method for the nonvolatile memory has the following advantages: 1. the method has very short execution time and very low storage overhead; 2. no hardware overhead is required; 3. for a variable level, the method has a better fine grain property and can realize better wear leveling; and 4. the method does not need to depend on any hardware and has very high practicality.

Description

technical field [0001] The invention belongs to the technical field of computer storage, and in particular relates to a wear leveling method of a nonvolatile memory. Background technique [0002] Phase change memory (PCM) is a new type of non-volatile memory. It has many remarkable characteristics such as non-volatility, low power consumption, high-speed reading, and dense storage. It is widely considered to be the most likely replacement for FLASH and DRAM. memory, and become the mainstream memory on embedded systems in the future. However, PCM is limited by its limited write endurance. A typical PCM unit can only tolerate 10 7 to 10 9 write operation, otherwise it loses the ability to change state. The write operation of a typical embedded program is often written to the memory in an extremely unbalanced way, for example: most of the write operations are concentrated on a small number of variables. Variables with frequent write operations will wear the location where ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/08
Inventor 沙行勉龙林波诸葛晴凤刘铎陈咸彰
Owner CHONGQING UNIV
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