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Chip, wire bonding method and device for chip packaging, and separation device

A technology of wire bonding and chip packaging, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problem of large chip size, achieve small size, solve the problem of large chip size and reduce volume Effect

Inactive Publication Date: 2019-06-07
CETC BEIJING ELECTRONICS EQUIP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0020] Embodiments of the present invention provide a chip, a wire bonding method and device for chip packaging, and a separation device, so as to at least solve the technical problem of large chip size in the prior art

Method used

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  • Chip, wire bonding method and device for chip packaging, and separation device
  • Chip, wire bonding method and device for chip packaging, and separation device
  • Chip, wire bonding method and device for chip packaging, and separation device

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Embodiment Construction

[0043] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only It is an embodiment of a part of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0044] It should be noted that the terms "first" and "second" in the description and claims of the present invention and the above drawings are used to distinguish similar objects, but not necessarily used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate ...

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Abstract

The invention discloses a chip, a lead bonding method and device for packaging the chip, and a separating device for packaging the chip. The method comprises: connecting a chip body with a lead frame by using a bonding lead, wherein the connecting point of the bonding lead is connected with the lead frame; and separating the connection point from the lead frame to obtain a chip with unconnected pins. The chip packaged by the lead bonding method is not provided with the lead frame and is small in size. Therefore, a technical problem of large chip size in the prior art is solved and an effect of reducing the chip size is achieved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a chip, a wire bonding method for chip packaging, a device and a separation device. Background technique [0002] The steps of chip packaging include different processes such as scribing, bonding, baking and curing, bonding, plastic sealing, and rib cutting. Bonding is the most important process. Bonding is to connect the circuit terminals or electrodes on the circuit chip with the The welding process in which the metal lead frame or the outer shell of the assembled chip is connected one by one with the electrode wires. [0003] Such as figure 1 As shown, the chip packaging method in the prior art may include the following steps: [0004] Step S102, dicing the wafer to obtain a single silicon wafer. [0005] After the wafer is processed, there are multiple silicon wafers on the resulting wafer, and after the functional testing of the silicon wafers, the individual silicon wafers ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/48H01L23/49
CPCH01L2224/45144H01L2224/45147H01L2224/48095H01L2224/48465H01L2224/85439H01L2924/00H01L2924/00014
Inventor 唐家霖李朝军高文举夏晓康叶乐志
Owner CETC BEIJING ELECTRONICS EQUIP
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