Parameter-configurable FPGA-based Ethernet UDP/IP processor

Abstract

The invention discloses a parameter-configurable FPGA-based Ethernet UDP / IP processor. A configuration control module and a PHY configuration module are added. Then, a frame sending configuration module and a frame receiving configuration module are added to a UDP / IP protocol stack module, and an MAC control configuration module is added to an MAC controller. The configuration control module receives system configuration data from a user side, including UDP / IP protocol stack configuration data, MAC control configuration data and PHY chip configuration data, and then, configures parameters to the corresponding modules through the frame sending configuration module, the frame receiving configuration module, the MAC control configuration module and the PHY configuration module and queries the configuration parameters in the corresponding modules. Through the configuration control module, users can configure and query the parameters of the Ethernet UDP / IP processor, the parameters of the processor can be modified conveniently and quickly, and therefore, the applicability of the Ethernet UDP / IP processor is improved.

Description

technical field [0001] The invention belongs to the field of FPGA-based network protocol stack technology, and more specifically relates to an FPGA-based Ethernet UDP / IP processor with configurable parameters. Background technique [0002] As a commonly used communication method, Ethernet has the advantages of wide application, high communication rate, and strong resource sharing ability, and is widely used in the field of interconnection communication of equipment. To achieve network communication between devices, the prerequisite is that the device integrates a network protocol stack. The transport layer protocols of the protocol stack mainly include TCP protocol and UDP protocol. UDP protocol is a connectionless, unreliable, message-based exchange protocol. Protocol, widely used in audio, video and other applications. In the past, most of the protocol stacks were implemented based on software, using the CPU serial execution method, the network transmission speed was low,...

AI Technical Summary

Problems solved by technology

[0003] The current FPGA-based Ethernet UDP / IP processor has the following disadvantages: (1) it has only realized the protocols of the transport layer and the network layer, and the MAC controllers in the network interface layer all rely on the provision of three parties, which increases the Implementation cost; (2) the MAC controller in the transport layer, network layer and network interface layer of the Ethernet UDP / IP processor cannot be configured by the user, so that the transmission can only communicate with a single communication node, and the entire The system configuration is troublesome. Every time the system configuration is modified, the code needs to be modified and re-programmed. The application is difficult and affects the performance of the entire system; (3) For network physical layer chips, most of them need to configure their registers to maximize their performance. The configuration of the FPGA-based Ethernet UDP / IP processor is more complicated than the software configuration

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