High-voltage heterojunction transistor

A heterojunction transistor and heterojunction technology, which is applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of vertical withstand voltage difference, achieve the goal of increasing the withstand voltage, improving the overall withstand voltage performance, and expanding the vertical withstand voltage Effect

Inactive Publication Date: 2016-02-17
SOUTHWEST JIAOTONG UNIV
View PDF6 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, there is a problem of poor longitudinal pressure resistance

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-voltage heterojunction transistor
  • High-voltage heterojunction transistor
  • High-voltage heterojunction transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0038] Such as figure 1 As shown, this embodiment is specifically related to a structure of the present invention, including the first electrode 101, the vertical withstand voltage structure 200, the fourth semiconductor 204, the fifth semiconductor 205, the passivation layer 206 , the second electrode region 102 , the third electrode region 103 , the fourth electrode 104 , the fifth electrode 105 and the sixth electrode 106 . The vertical withstand voltage structure 200 above the first electrode 101 includes a first semiconductor 201 , a second semiconductor 202 and a third semiconductor 203 sequentially arranged from bottom to top.

[0039]The fifth semiconductor 205 and the second electrode region 102 and the third electrode region 103 on both sides thereof are directly arranged on the fourth semiconductor 204, and the second electrode region 102 and the third electrode region 103 are respectively covered with The fourth electrode 104 and the fifth electrode 105, at the sa...

Embodiment 2

[0051] Such as Figure 8 As shown, based on some specific embodiments shown in Embodiment 1, a solution of another embodiment of the present invention is shown, that is, doping in n (n≥2) layer distribution intervals at the substrate. In this embodiment, the introduction of doping in the multi-layer distribution interval can further deplete the substrate region on the basis of the distributed doping in the epitaxial layer and the depletion buffer layer, thereby improving the withstand voltage capability of the substrate.

[0052] This embodiment is not limited to only performing multi-layer distributed interval doping on the substrate layer, and multi-layer distributed interval doping can also be performed on the epitaxial layer.

Embodiment 3

[0054] Such as Figure 9 As shown, the structure of this embodiment is similar to that of Embodiment 1, and its own characteristic is that N-type and P-type doped regions are used alternately on the side of the substrate close to the buffer layer. knot structure.

[0055] This embodiment is not limited to Figure 9 As shown, only the substrate layer is alternately doped with N-type and P-type, and the epitaxial layer, that is, the so-called third semiconductor layer 203 , can also be alternately doped with N-type and P-type.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to the technology of semiconductors, and particularly relates to a high-voltage heterojunction transistor. An N-type structure is doped in partial intervals of a device epitaxial layer and a P-type exhaust structure is doped in partial intervals of a silicon-based substrate layer based on a conventional transverse heterojunction transistor device structure. The substrate and a buffer layer are enabled to be completely exhausted by introduction of a P-type doping region and an N-type doping region so that the substrate is enabled to bear longitudinal withstanding voltage, and thus voltage withstanding capacity of the device can be improved. Meanwhile, height of a barrier layer is increased and a leakage current channel is blocked by introduction of P-type impurities in the epitaxial layer, and finally leakage current is reduced.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a high-voltage heterojunction transistor. Background technique [0002] The lateral AlGaN / GaN HFET heterojunction transistor device has superior material properties, such as inherent spontaneous polarization and piezoelectric polarization characteristics, and can form a high concentration of 2DEG at the heterojunction interface to form a low on-resistance channel. As a typical third-generation wide-bandgap semiconductor, it is known as one of the best candidates to replace Si-based power devices. As a lateral AlGaN / GaN HFET, it belongs to the surface heterojunction film withstand voltage structure, because the lateral withstand voltage of early devices is limited, and the vertical withstand voltage of the device is ignored. With the optimization and improvement of device structure, its lateral withstand voltage has also been greatly improved, and the problem of limited vertical withst...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L29/778H01L29/06
CPCH01L29/7787H01L29/0634H01L29/0638
Inventor 汪志刚王冰孙江樊冬冬杨大力王亚南
Owner SOUTHWEST JIAOTONG UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap