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A kind of finfet structure and its manufacturing method

A technology of manufacturing method and device manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to achieve high operating current, improve short channel effect, low subthreshold slope and leakage current

Active Publication Date: 2018-09-07
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The invention provides a U-shaped FinFET structure and a manufacturing method thereof, and proposes a new device structure on the basis of the existing FinFET technology, so that the gate length of the device is not limited by the size of the footprint, and effectively solves the problem of short channel The problem with the effect

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  • A kind of finfet structure and its manufacturing method
  • A kind of finfet structure and its manufacturing method
  • A kind of finfet structure and its manufacturing method

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Embodiment Construction

[0036] In order to make the object, technical solution and advantages of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0037] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0038] Such as Figure 10 As shown, the present invention provides a FinFET structure, including: a substrate structure, the substrate structure is an SOI substrate; a first fin and a second fin, the first and second fins are located on the Above the substrate structure, parallel to each other; a gate stack, the ga...

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Abstract

A FinFET structure and manufacturing method thereof, comprising: a substrate structure being an SOI substrate; a parallel first fin (210) and second fin (220) located above the substrate structure; a gate electrode stack (300) covering the substrate structure and the side wall of a part of the first fin (210) and the second fin (220); a source region (410) located in the region of the first fins (210) not covered by the gate electrode stack; a drain region (420) located in the region of the second fin (220) not covered by the gate electrode stack; a side wall (230) located at two sides of the first fin (210) and the second fin (220) and above the gate electrode stack (300) to isolate the source region, the drain region and the gate electrode stack; and a substrate structure channel region located in a region of the substrate structure adjacent to an upper surface. A new device structure is provided on the basis of an existing FinFET process, thus enabling the gate length of the device to be free of footprint size limitations, and effectively solving a problem caused by a short channel effect.

Description

technical field [0001] The present invention relates to a method for manufacturing a semiconductor device, in particular to a method for manufacturing a FinFET. technical background [0002] Moore's Law states that the number of transistors that can be accommodated on an integrated circuit doubles every 18 months, and the performance also doubles at the same time. At present, with the development of integrated circuit technology and technology, devices such as diodes, MOSFETs, and FinFETs have appeared successively, and the size of nodes has been continuously reduced. However, since 2011, silicon transistors have approached the atomic level and reached the physical limit. Due to the natural properties of this material, in addition to the short-channel effect, the quantum effect of the device also has a great impact on the performance of the device. The speed and performance of silicon transistors are hard to break through. Therefore, how to greatly improve the performance ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/10H01L29/06H01L21/336
CPCH01L29/10H01L29/78
Inventor 尹海洲刘云飞李睿
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI