Data receiving chip
A technology for receiving chips and data, applied in the field of data receiving chips, can solve problems such as affecting data accuracy, and achieve the effect of reducing the number of pins and reducing the bit error rate
Active Publication Date: 2016-04-13
VIA ALLIANCE SEMICON CO LTD
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- Application Information
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Problems solved by technology
However, when the data receiving chip reads the memory, if an external signal is used, it is easily disturbed by external noise, thus affecting the accuracy of the data
Method used
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Embodiment Construction
[0011] Figure 1A It is a schematic diagram of the control system of the present invention. The control system 100A includes an external memory 110 and a data receiving chip 120A. The external memory 110 can be a volatile memory or a non-volatile memory. In one embodiment, the external memory 110 is a dynamic random access memory (Dynamic Random Access Memory, DRAM), but this is not intended to limit the present invention. As shown in the figure, the external memory 110 has input and output pins IO0˜IO7, but this is not intended to limit the present invention. In other embodiments, the external memory 110 has other numbers of input and output pins. The input and output pins IO0~IO7 transmit data DQ~DQ respectively.
[0012] The data receiving chip 120A is coupled to the external memory 110 and operates according to the operating voltages VPP and VSS. In one embodiment, the data receiving chip 120A is a memory controller. In this embodiment, the data receiving chip 120A in...
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The invention provides a data receiving chip coupled with an external memory. The external memory includes a first input / output pin used for outputting first data. The data receiving chip comprises a comparison module coupled with the first input / output pin and a first operating voltage, wherein the comparison module is used for receiving the first data, comparing the first data with a first reference voltage and recognizing values of the first data; and a voltage generation module used for generating the first reference voltage; the voltage generation module includes a first resistor; a second resistor connected with the first resistor in series, wherein the first resistor and the second resistor perform voltage division on the first operating voltage, and generate a direct current component of the first reference voltage; a first capacitor; and a second capacitor coupled with the first capacitor, wherein the first capacitor and the second capacitor perform voltage division on the first operating voltage and generate an alternating current component of the first reference voltage.
Description
technical field [0001] The invention relates to a data receiving chip, in particular to a data receiving chip capable of generating a reference voltage. Background technique [0002] Memory can generally be divided into read-only memory (ReadOnlyMemory: ROM) and random access memory (RandomAccessMemory: RAM). Common read-only memories include Programmable ROM: PROM, Erasable PROM: EPROM, Electrically Erasable EPROM: EEPROM, and Flash memory. Common random access memories include static random access memory (Static RAM: SRAM) and dynamic random access memory (Dynamic RAM: DRAM). [0003] The memory access is usually performed by a data receiving chip. However, when the data receiving chip reads the memory, if an external signal is used, it is easily disturbed by external noise, thus affecting the accuracy of the data. Contents of the invention [0004] The invention provides a data receiving chip, which is coupled with an external memory. The external memory has a first...
Claims
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IPC IPC(8): G11C5/14G11C11/4074G11C11/4096
CPCG11C5/141G11C11/4074G11C11/4096G11C5/147G11C7/1084G11C11/4099
Inventor 孙宏全
Owner VIA ALLIANCE SEMICON CO LTD