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Single FPGA digital controller based on LEON3 soft core

A technology of digital controller and bus controller, which is applied in the direction of program control, computer control, general control system, etc., can solve the problem of low flexibility of digital controller, and achieve flexible and convenient software debugging, reduced delay, and high computing efficiency Effect

Inactive Publication Date: 2016-06-01
BEIJING LINJIN SPACE AIRCRAFT SYST ENG INST +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is: the existing digital controllers with all the functions realized in the way of hardware description language have low flexibility

Method used

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  • Single FPGA digital controller based on LEON3 soft core
  • Single FPGA digital controller based on LEON3 soft core

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Experimental program
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Embodiment Construction

[0016] A single FPGA digital controller based on LEON3 soft core, such as figure 1 As shown, it includes: LEON3 processor 1 implemented in VHDL hardware description language, two serial communication modules 2, AHB bus controller 3, storage controller 4, AHB / APB bridge 5, floating point processor 6, AHB bus 7. A / D synchronous sampling control module 8 , PWM output module 9 , direct calculation module 10 and APB bus 11 . The LEON3 processor 1, two serial port communication modules 2, the AHB bus controller 3, the storage controller 4, the AHB / APB bridge 5 and the floating point processor 6 are all connected to the AHB bus 7, and the AHB / APB bridge The device 5, the A / D synchronous sampling control module 8, the PWM output module 9 and the direct calculation module 10 are all connected to the APB bus 11.

[0017] The A / D synchronous sampling control module 8 is used to control the A / D conversion chip to perform data sampling and read the sampling result.

[0018] The PWM outpu...

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Abstract

The invention belongs to the technical field of digital signal processing, and specifically relates to a single FPGA digital controller based on an LEON3 soft core. The FPGA digital controller comprises an LEON3 processor, two serial-port communication modules, an AHB bus controller, a storage controller, an AHB / APB bridge, a floating point processor, an AHB bus, an A / D synchronous sampling control module, a PWM output module, a direct calculation module and an APB bus. The problem of low digital controller flexibility that all existing functions are achieved in a hardware description language manner is solved, a main program, a monitoring program and the like are operated on a processor soft core in a software form, and software debugging is flexible and convenient; and digital filtering, floating point calculation, a communication interface and the like are achieved through a VHDL hardware description language, operation efficiency is high, and data processing synchronism is good.

Description

technical field [0001] The invention belongs to the technical field of digital signal processing, and in particular relates to a single FPGA digital controller based on a LEON3 soft core. Background technique [0002] The performance of a digital controller is usually determined by factors such as delay in the A / D conversion process, calculation delay, signal modulation delay, transmission delay, and limited bit accuracy in the digitization process. The DSP-based digital controller has strong serial computing and processing capabilities, but the interface is inflexible and parallel processing capabilities are insufficient, which affects the control effect. FPGA has large data throughput, rich resources such as I / O, and flexible parallel computing capabilities. It can provide the smallest calculation delay and provide higher digital precision than standard DSP. The digital controller based on DSP+FPGA solves the problem of data parallel processing and peripheral interface, b...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05B19/042
Inventor 潘明健李彬杨飞刘波荣利霞宋凯歌
Owner BEIJING LINJIN SPACE AIRCRAFT SYST ENG INST
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