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Pixel unit as well as manufacturing method, array substrate and display device thereof

A technology for a pixel unit and a manufacturing method, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, instruments, etc., can solve the problems of high contact resistance, low effective current, and large power consumption of the display, and achieves an increase in effective current and a decrease in The effect of small contact resistance and increased contact area

Active Publication Date: 2016-07-06
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In order to solve the problem that the contact resistance between the pixel electrode and the drain is high, so that the effective current generated by the transistor is small, and the power consumed by the entire display is large, on the one hand, the embodiment of the present invention provides a pixel unit, The pixel unit includes:

Method used

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  • Pixel unit as well as manufacturing method, array substrate and display device thereof
  • Pixel unit as well as manufacturing method, array substrate and display device thereof
  • Pixel unit as well as manufacturing method, array substrate and display device thereof

Examples

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Embodiment 1

[0058] In order to solve the problem that the contact resistance between the pixel electrode 3 and the drain 21 is relatively high, so that the effective current generated by the transistor 2 is small, and the power consumed by the entire display is large, as figure 2 As shown, the embodiment of the present invention provides a pixel unit, the pixel unit includes:

[0059] transistor 2;

[0060] A first underlying conductive layer 311 is formed on the drain 21 of the transistor 2, and the first underlying conductive layer 311 covers the drain 21;

[0061] A planar layer 4 is formed on the transistor 2 and the first underlying conductive layer 311, and a via hole is provided on the planar layer 4;

[0062] A metal layer 32 and a top conductive layer 33 are sequentially formed on the planar layer 4 , and the metal layer 32 is electrically connected to the first bottom conductive layer 311 through via holes.

[0063] Such as figure 2 As shown, the transistor 2 in this embodi...

Embodiment 2

[0085] An embodiment of the present invention provides an array substrate, which includes a base substrate 1 and at least one pixel unit described in Embodiment 1 disposed on the base substrate 1 .

[0086]In the array substrate in the embodiment of the present invention, the first underlying conductive layer 311 of the pixel electrode 3 of each pixel unit is covered on the drain 21, which increases the contact area between the first underlying conductive layer 311 and the drain 21 , the contact resistance is reduced, the effective current is increased, and the power consumed by the display device is reduced; since the contact area between the first bottom conductive layer 311 and the drain electrode 21 increases, the contact area between the first bottom conductive layer 311 and the drain electrode 21 The adhesion is enhanced to prevent the phenomenon that the first bottom conductive layer 311 and the drain electrode 21 fall off from the drain electrode 21 because the contact ...

Embodiment 3

[0088] An embodiment of the present invention provides a display device. The display device may be an active matrix liquid crystal display device or an active matrix organic light emitting display device. The display device includes the array substrate described in Embodiment 2, specifically: a liquid crystal display device Panels, electronic paper, OLED panels, mobile phones, tablet computers, TVs, monitors, notebook computers, digital photo frames, navigators and any other products or components with display functions. When the display device is an active matrix organic light emitting display device, such as Figure 4 As shown, at this time, a pixel definition layer 5 can be formed on the pixel electrode 3 of the pixel unit, and a light-emitting layer can be formed on the pixel definition layer 5, so that the display device can display images, which will not be described here.

[0089] In the display device in the embodiment of the present invention, the first underlying con...

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PUM

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Abstract

The invention discloses a pixel unit as well as a manufacturing method, an array substrate and a display device thereof, and belongs to the technical field of display. The pixel unit comprises a transistor, wherein a first bottom layer conductive layer is formed in the drain of the transistor; the drain is covered by the first bottom layer conductive layer; flat layers are formed in the transistor and the first bottom layer conductive layer; through holes are formed in the flat layers; metal layers are arranged on the flat layers; the metal layers are electrically connected with the first bottom layer conductive layer through the through holes. As the drain is covered by the first bottom layer conductive layer of a pixel electrode, the contact area of the first bottom layer conductive layer and the drain is increased, the contact resistance is reduced, the current can be effectively increased, and the power consumed by the display device is reduced.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a pixel unit and a manufacturing method thereof, an array substrate and a display device. Background technique [0002] With the continuous development of display technology, active-matrix liquid crystal displays and active-matrix organic light-emitting displays have been widely developed and utilized. Both active-matrix liquid crystal displays and active-matrix organic light-emitting displays include array substrates. Drive the monitor to display the picture. [0003] Such as figure 1 As shown, the current array substrate includes a base substrate 1 and a plurality of pixel units arranged on the base substrate 1, and each pixel unit includes a transistor 2, a pixel electrode 3 and a flat surface between the transistor 2 and the pixel electrode 3. Layer 4, a via hole is provided on the flat layer 4, and the pixel electrode 3 usually includes three layers, which are res...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/124H01L27/1244H01L27/1259H01L27/1248G02F1/133357G02F1/133345G02F1/136286G02F1/1368G02F2201/123
Inventor 王祖强
Owner BOE TECH GRP CO LTD
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