Efficient FPGA configuration backward-reading device and method

An efficient, configuration-area technology, applied in the field of electronic information systems, can solve problems such as FPGA function failure, and achieve the effect of reducing risks, saving interval time, and feasible solutions

Inactive Publication Date: 2016-07-13
SHANGHAI SATELLITE ENG INST
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Because the FPGA logic gates are all dynamically loaded into the SRAM, the work in the space radiation environment is easily affected by single event flipping, etc., resulting in the failure of some or all functions of the FPGA.

Method used

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  • Efficient FPGA configuration backward-reading device and method
  • Efficient FPGA configuration backward-reading device and method

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Embodiment Construction

[0036] The present invention will be described in detail below in conjunction with specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0037] The invention discloses a high-efficiency FPGA configuration read-back device and method, which mainly solve the problem of FPGA function abnormality caused by flipping of the FPGA configuration area in a complex space environment. Its equipment includes a loading module, a readback module, a comparison module, and a control module; the loading module completes reloading after the data comparison in the FPGA configuration area finds an error; the readback module reads the configuration data of the...

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Abstract

The invention provides an efficient FPGA configuration backward-reading device and method.The device and method mainly solve the problem of FPGA function abnormality caused by overturning of an FPGA configuration area in a complex environment of a space.The device comprises a loading module, a backward-reading module, a comparison module and a polling module, wherein the loading module completes data comparison of the FPGA configuration area and re-loading after a mistake is found; the backward-reading module reads FPGA configuration data in the idle state; the comparison module completes comparison between the configuration data read by the backward-reading module and original data and template data; the polling module completes polling of the FPGA state and transmits control signals to all the modules.According to the efficient FPGA configuration backward-reading device and method, the idle detection and overtime exit method is adopted, and high efficiency of the configuration backward-reading device is achieved.

Description

technical field [0001] The present invention relates to an electronic information system, in particular to a high-efficiency FPGA configuration read-back device and method, especially suitable for on-board electronic information systems, so as to meet the long-term stable operation of the SRAM-type FPGA of the on-board electronic information system in complex space environments. Background technique [0002] SRAM (Static Random Access Memory, Static Random Access Memory) FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) has been widely used in the aerospace field due to its rich logic resources, fast speed and reprogrammable capability. Because the FPGA logic gates are all dynamically loaded into the SRAM, the work in the space radiation environment is easily affected by single event flipping, etc., resulting in the failure of some or all functions of the FPGA. [0003] After the SRAM type FPGA is powered on and reset, the configuration file solidified in t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/07
CPCG06F11/0751G06F11/0757
Inventor 李博顾桂华叶晖杨炳轲汪栋硕
Owner SHANGHAI SATELLITE ENG INST
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