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Compatibility scan chain compression method based on at least clique covering

A compression method and scan chain technology, applied in the direction of electrical components, code conversion, etc., can solve the problems of reduced compression effect and only one, and achieve the effect of compressing width and reducing length

Inactive Publication Date: 2016-07-20
ANQING NORMAL UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This method can find the largest subset in the graph, but it is easy to generate more subsets with only one vertex, resulting in a decrease in the overall compression effect

Method used

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  • Compatibility scan chain compression method based on at least clique covering
  • Compatibility scan chain compression method based on at least clique covering
  • Compatibility scan chain compression method based on at least clique covering

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Embodiment Construction

[0028] The present invention will be described in further detail below according to the drawings and embodiments.

[0029] The present invention, refer to Figure 4 , a compatible scan chain compression method based on least clique coverage, the steps include:

[0030] Without loss of generality, the original test data of multiple scan chains and multiple bit sequences of each scan chain are shown in Table 1.

[0031] Table 1 scan chain arrangement

[0032]

[0033]

[0034] (a) Construct an undirected graph G. Treat each scan chain as a vertex of the graph, and add an edge between the two vertices if the two scan chains are compatible. According to this method, the compatibility relationship of the scan chain can be constructed as an undirected graph G=(V, E), where V is a set of vertices, and E is a set of edges. The undirected graph G constructed according to the compatibility relationship of the scan chain in Table 1 is as figure 1 shown.

[0035] (b) Copy the ...

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Abstract

The present invention discloses a compatibility scan chain compression method based on at least clique covering, and especially relates to a compatibility scan chain compression method based on at least clique covering integrating the circuit test technology, especially provides a test data compression method in the built-in-self test method of a system on a chip. A heuristic algorithm with a vertex degree from small to large for searching clique is employed, the fewest cliques are used for covering all the vertexes of a diagram, and the number of the scan chain is compressed to the minimum, so that the width of the test data is reduced, and the test application time is shortened. The compatibility scan chain compression method based on at least clique covering is compatible to a traditional test data compression method based on coding, and the result of the compatibility scan chain compression method is applicable to secondary compression of a traditional test data compression method.

Description

technical field [0001] The invention relates to a compatible scan chain compression method, especially a compatible scan chain compression method based on the least group coverage, integrated circuit testing technology, especially the built-in system chip (System-on-a-Chip, SoC) The data compression method is tested in the Built-InSelf-Test (BIST) method. Background technique [0002] With the rapid development of semiconductor technology, the integration of SoC is getting higher and higher, the chip size is getting smaller and smaller, the manufacturing cost is continuously reduced, and the performance of the system is greatly improved. However, on the other hand, it brings many problems to the test of the chip, such as: the amount of test data increases exponentially, the test complexity is getting higher and higher, the test power consumption is getting bigger and bigger, and the test application time is getting longer and longer. Wait. [0003] The test data compressio...

Claims

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Application Information

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IPC IPC(8): H03M7/30
CPCH03M7/30
Inventor 吴海峰吴琼詹文法程一飞张翠娟
Owner ANQING NORMAL UNIV
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