An insulating substrate structure and a power module using the substrate
A technology for insulating substrates and power modules, applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of power module reliability, chip overcurrent burnout, large chip loss, etc., so as to reduce the risk of burnout and reduce input resistance, the effect of improving reliability
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Embodiment 1
[0028] An insulating substrate structure, and a power module using the structure, the insulating substrate structure is as follows figure 1 As shown, it includes a ceramic insulating layer and a metal layer formed on the ceramic insulating layer. The material of the metal layer is copper or aluminum, and the surface is plated with nickel and gold or nickel and silver. The metal layer is printed by thick film printing technology or brazing technology. Realized, the thickness is 0.1mm-1mm.
[0029] The metal layer includes an upper bridge arm metal layer 1 and a lower bridge arm metal layer 2, the upper bridge arm chip unit 3 is sintered or welded on the upper bridge arm metal layer 1, and the lower bridge arm chip is sintered or welded on the lower bridge arm metal layer 2 Unit 4, the lower bridge arm metal layer 2 includes the wiring area 5, the upper bridge arm chip unit 3 is connected to the wiring area 5 through the bonding wire 6, the bonding wire 6 referred to below is th...
Embodiment 2
[0039] This embodiment also provides an insulating substrate structure and a power module using the substrate. Its structure is roughly the same as that provided in Embodiment 1. The difference between the two is that the power module in this embodiment adopts the The structure of length balance groove 7 shown in.
Embodiment 3
[0041] This embodiment also provides an insulating substrate structure and a power module using the substrate, such as Image 6 As shown, its structure is roughly the same as that provided in Embodiment 1. The difference between the two is that all the half-bridge structures in this embodiment are connected to two DC input terminals 8. The electrical structure topology diagram is as follows Figure 7 shown.
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Abstract
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