Method of forming gate oxide layer

A gate oxide layer and gate oxide layer technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of high cost and cumbersome steps.

Inactive Publication Date: 2016-10-05
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0014] The purpose of this application is to provide a method for forming a gate oxide layer to solve the problems of cumbersome steps and high cost in the prior art

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[0046] It should be pointed out that the following detailed description is exemplary and intended to provide further explanation to the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0047] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural, and it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, they mean There are features, steps, operations, means, components and / or combinations thereof.

[0048] For the convenience of description, spatially relative terms may be used here, such as "on ...", "over .....

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Abstract

The invention provides a method of forming a gate oxide layer. The method comprises the steps of S1, conducting the oxidation growth on the upper surface of a semiconductor substrate to form an oxide layer; S2, etching to remove the oxide layer located at a first position to expose the part of the semiconductor substrate that is corresponding to the first position; S3, conducting the oxidation growth on the exposed semiconductor substrate to form a first gate oxide layer of H1 in thickness; S4, etching to remove the first gate oxide layer at a second position to expose the part of the semiconductor substrate that is corresponding to the second position; S5, conducting the oxidation growth on the exposed semiconductor substrate to form a second gate oxide layer of H2 in thickness, wherein H2<H1; and S6, implanting ions into the semiconductor substrate below the first gate oxide layer and the second gate oxide layer. Through adjusting the manufacturing process of the first gate oxide layer and the second gate oxide layer, the process of implanting ions and adjusting the threshold voltage respectively is replaced. Therefore, the problems that the process is complicated and the cost is high can be solved.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a method for forming a gate oxide layer. Background technique [0002] The dual core GOX process is a conventional process currently used in the 45nmLP (low power process) and 28nm PloySION (polysilicon gate + silicon oxynitride insulating layer) process for speed-up. This process requires the formation of two thickness difference around the gate oxide. For example, a gate oxide layer with a normal thickness is used for conventional logic cells that can withstand the leakage current of the entire chip, and a gate oxide layer with a thinner thickness is used for speed push areas that control chip speed. [0003] At present, in order to obtain sufficient saturation current in the boosting region, after forming gate oxide layers with different thicknesses, ion implantation is used to adjust the threshold voltage of the boosting region, so as to ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/265
Inventor 徐宽陈武佳
Owner SEMICON MFG INT (SHANGHAI) CORP
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