Wafer-level packaging method for CMOS image sensor

An image sensor, wafer-level packaging technology, applied in the field of image sensors, can solve the problems of high thickness, high pixel product performance affecting image performance, etc., to achieve the effect of improving performance and reducing overall thickness

Active Publication Date: 2016-10-12
GALAXYCORE SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This traditional CMOS image sensor has a high thickness after wafer-level packaging (including the thickness of the package body and the increas

Method used

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  • Wafer-level packaging method for CMOS image sensor
  • Wafer-level packaging method for CMOS image sensor
  • Wafer-level packaging method for CMOS image sensor

Examples

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Example Embodiment

[0023] Example one

[0024] Figure 1-Figure 10 It is a schematic diagram of the process of the wafer-level packaging method of the CMOS image sensor according to the first embodiment of the present invention.

[0025] Such as figure 1 As shown, a first wafer 100 is provided. The first wafer 100 has a plurality of image sensor chips, which are shown here as two adjacent image sensor chips, and the image sensor chips have dicing channels (with The dotted line indicates), the image sensor chip has a photosensitive area 101 and a non-sensitive area, the photosensitive area has a pixel unit, and the non-sensitive area has a pad 102.

[0026] Such as figure 2 As shown, a second wafer 200 is provided, and a plurality of first grooves 201 are formed on the first surface 200A of the second wafer 200, and the first grooves 201 correspond to the photosensitive area 101 of the image sensor; A number of second grooves 202 are formed on the first surface 200A, and the second grooves 202 corres...

Example Embodiment

[0035] Example two

[0036] Figure 11-20 It is a schematic diagram of the process of the wafer-level packaging method of the CMOS image sensor according to the second embodiment of the present invention.

[0037] Such as Picture 11 As shown, a first wafer 1100 is provided, and the first wafer 1100 has a plurality of image sensor chips, which are shown as two adjacent image sensor chips, and the image sensor chips have dicing channels (with The dotted line indicates), the image sensor chip has a photosensitive area 1101 and a non-sensitive area, the photosensitive area has a pixel unit, and the non-sensitive area has a pad 1102.

[0038] Such as Picture 12 As shown, a second wafer 1200 is provided, and a plurality of first grooves 1201 are formed on the first surface 1200A of the second wafer 1200, and the first grooves 1201 correspond to the photosensitive area 1101 of the image sensor; A number of second grooves 1202 are formed on the first surface 1200A, and the second grooves...

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Abstract

Provided in the invention is a wafer-level packaging method for a CMOS image sensor. According to the method, a contact can be formed in a light-sensing surface of a chip by various ways of a ball grid array (BGA), a bump, and a lead; and assembling is carried out by silver paste connection, anisotropic conductive film (ACF) connection, pulse welding connection, ultrasonic connection, and solder ball thermal connection and the like. Therefore, the overall thickness after packaging is reduced effectively; and the image sensor performance is improved. The method is especially suitable for a high-pixel CMOS image sensor product and is also suitable for wafer-level packaging of a multi-camera module group product.

Description

technical field [0001] The invention relates to the field of image sensors, in particular to a wafer-level packaging method for a CMOS image sensor. Background technique [0002] Traditional wafer-level packaging of CMOS image sensors usually uses wafer-level glass to bond wafer-level chips through a certain height of the bank (DAM), grinds the back of the wafer to make leads and ball grid arrays (BGA), and cuts into A package structure that encapsulates a single chip. This traditional CMOS image sensor has a high thickness after wafer-level packaging (including the thickness of the package body and the increased thickness of the surface assembly are too high), and affects the performance of the image, especially the performance of high-pixel products. Contents of the invention [0003] The purpose of the present invention is to provide a wafer-level packaging method for a CMOS image sensor, which reduces the overall thickness of the package and improves the performance o...

Claims

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Application Information

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IPC IPC(8): H01L27/146
CPCH01L27/14687H01L27/1469
Inventor 赵立新邓辉
Owner GALAXYCORE SHANGHAI
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