Producing method for P-trench VDMOS device

Abstract

The invention discloses a producing method for a P-trench VDMOS device. The method comprises: an oxidation layer grows on an epitaxial layer, a photoresist layer covers the oxidation layer, and adhesive-included N type impurity injection is carried out; a needed N type base region junction depth is formed in the upper surface of the epitaxial layer after high-temperature annealing; boron impurity injection is carried out on the oxidation layer; a gate oxide layer grows on the epitaxial layer, polysilicon deposition and doping are carried out on the gate oxide layer, a polysilicon gate layer is formed by using a polysilicon gate photoetching panel; a photoresist covers a local area of the gate oxide layer, source P+ processing is carried out directly, and then a P+ region is formed in the N type base region; and then an inner metal insulating layer is deposited and metal layer are arranged on the upper surface and the lower surface of the epitaxial layer to form a standard VDMOS device. According to the method, the Vth value of the P-trench VDMOS device can be stabilized between 2 to 4V; and the stability and reasonability are high.

Description

technical field [0001] The invention relates to a production method of a P-channel VDMOS device, which belongs to the field of semiconductor production. Background technique [0002] At present, the production process of P-channel VDMOS devices is basically the same as that of N-channel VDMOS devices, as follows: [0003] In the VTH formation process of N-type VDMOS devices, after the gate oxide growth and polysilicon gate etching are completed, a certain dose of P-type impurities is first implanted through the polysilicon gate self-alignment process, and then annealed at high temperature to form a P-type with a certain junction depth. The base region, and then use the polycrystalline gate self-alignment process to perform source N+ high-dose implantation and annealing. In this way, the channel is formed by the difference in the second lateral diffusion junction depth between the P-type base region and the N+ source region, and finally VTH The size is determined by the gate...

AI Technical Summary

Problems solved by technology

[0004] A: The high-temperature heat treatment process causes heavily doped phosphorus impurities in polysilicon to easily cross the gate oxide and reach the channel surface, resulting in the accumulation of similar impurities, which directly leads to a larger Vth;

[0005] B: The influence of oxide charge, especially the high temperature process after the gate oxide will lead to positive oxide charge accumulation, and positive oxidation charge will cause the Vth of P-channel VDMOS to increase;

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