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Wafer Thinning Methods

A technology of wafers and device wafers, which is applied in the field of wafer thinning, can solve problems affecting the process, and achieve the effect of avoiding peeling

Active Publication Date: 2020-02-07
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the process of performing the thinning process on the back side of the device wafer afterwards, the wet etching solution will corrode the metal structure on the crystal edge of the device wafer, and the etching rate of the wet etching solution to the metal structure is greater than The etch rate of the substrate material on the back side of the device wafer, so that defects affect the progress of subsequent processes
[0008] In order to reduce the above-mentioned defects, a grinding process is performed after the wet etching process in the prior art, but this grinding process only improves the smoothness of the wafer surface, and does not reduce or avoid the peeling formed when the wafer is thinned (peeling), silicon damage (Si damage) and other defects

Method used

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Examples

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no. 1 example

[0046] see Figure 2-Figure 7 Specifically illustrate the wafer thinning method of the present invention, Figure 2-Figure 7 It is a schematic diagram of a cross-sectional structure of a wafer during the preparation process of the wafer thinning method according to the first embodiment of the present invention.

[0047] First, if figure 2 As shown, step S11 is performed to provide a device wafer 100 , and the device wafer 100 includes a front side 101 and a back side 102 opposite to the front side 101 . The front side 101 is prepared with device structures, such as active regions, gate structures, interconnect structures, and the like. The back surface 102 has a base material, such as a semiconductor material such as monocrystalline silicon.

[0048] Then proceed to step S12, such as image 3 As shown, a first edge grinding process is performed on the device wafer 100 to grind the edge of the device wafer 100 to form a sidewall 103 at the edge of the device wafer 100 , t...

no. 2 example

[0060] see Figure 8-Figure 11 ,in, Figure 8-Figure 11 It is a schematic diagram of a cross-sectional structure of a wafer during the preparation process of the wafer thinning method according to the second embodiment of the present invention. exist Figure 8-Figure 11 , the reference numerals indicate the same Figure 2-Figure 7 The same expression is the same structure as the first embodiment. The method of the second embodiment is basically the same as the method of the first embodiment, the difference is that in step S13, as Figure 8 As shown, the protective layer 220 does not cover the front surface 101 of the device wafer 100 , and a covering layer 221 is formed on the front surface 101 of the device wafer 100 to protect the front surface 101 of the device wafer 100 . Preferably, the protective layer 120 is made of oxide, such as silicon oxide or silicon oxycarbide, which can well protect the interconnection structure at the sidewall 103 and is easily removed in st...

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Abstract

The invention discloses a wafer thinning method. The wafer thinning method comprises the following steps: providing a device wafer, wherein the device wafer comprises a front face and a back face opposite to the front face; performing a first crystal edge grinding process on the device wafer, and grinding the crystal edge of the device wafer so as to form a side wall on the crystal edge of the device wafer, wherein the side wall is at least connected with the front face of the device wafer; forming a protective layer on the side wall of the device wafer; laminating the device wafer to a bearing wafer, wherein the front face of the device wafer faces the bearing wafer; performing a thinning process on the back face of the device wafer and the protective layer on the side wall of the device wafer; carrying out a second crystal edge grinding process, and removing the protective layer on the side wall of the device wafer. By using the manufacturing method disclosed by the invention, the defects such as peeling and silicon damage formed during wafer thinning can be reduced or avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer thinning method. Background technique [0002] In the field of semiconductor manufacturing, after the device structure is prepared on the front side of the device wafer, the back side of the device wafer needs to be thinned. Since the thinned wafer can facilitate packaging and effectively transmit light, etc., the wafer The thinning process has become an important process in the field of semiconductor manufacturing, such as the field of integrated circuits. [0003] In the prior art, common wafer thinning methods include: [0004] First, performing a wafer edge grinding process on the device wafer, grinding the wafer edge of the device wafer to form a sidewall on the wafer edge of the device wafer; [0005] Next, bonding the device wafer to a carrier wafer, wherein the front side of the device wafer faces the carrier wafer; [0006] Next, perform a ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02
Inventor 王娉婷
Owner SEMICON MFG INT (SHANGHAI) CORP
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