Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

semiconductor module

A semiconductor and interconnection layer technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., can solve problems such as unfavorable and affecting IGBT component gating

Pending Publication Date: 2016-11-23
KK TOSHIBA
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It is possible that noise generated in the semiconductor module could adversely affect the gating of the IGBT elements

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • semiconductor module
  • semiconductor module
  • semiconductor module

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0022] Figure 1A is a schematic plan view showing the semiconductor module according to the first embodiment, and Figure 1B and Figure 1C is a schematic cross-sectional view showing part of the semiconductor module according to the first embodiment.

[0023] In this article, along the Figure 1A The cross-section at the position taken by the line A-A' is shown in Figure 1B middle. along Figure 1A The cross-section at the position taken by the line BB' is shown in Figure 1C middle. In addition, three-dimensional coordinates are illustrated in the drawings to describe the arrangement relationship and dimensions of each component.

[0024] Figures 1A to 1C The semiconductor module 100 shown in includes a substrate 10, an interconnection layer 21 (first interconnection layer), an interconnection layer 22 (second interconnection layer), an interconnection layer 23 (third interconnection layer), a plurality of Semiconductor elements 1A and 1B (first semiconductor elemen...

no. 2 example

[0074] Figure 6A is a schematic plan view showing a semiconductor module according to the second embodiment, and Figure 6B is a schematic sectional view showing a part of the semiconductor module according to the second embodiment.

[0075] In this article, along the Figure 6A The cross-section at the position taken by the line C-C' is shown in Figure 6B middle.

[0076] In the semiconductor module 101 according to the second embodiment, the concavo-convex structure 201 is provided on the side surface 22 sw of the interconnection layer 22 . In some cases, the noise current is deflected to, for example, the side surface of the interconnection layer 22 . In this case, it is possible to effectively attenuate the S21 parameter using the concavo-convex structure 201 .

no. 3 example

[0078] Figure 7A is a schematic plan view showing a semiconductor module according to a third embodiment, and Figure 7B is a schematic sectional view showing a part of the semiconductor module according to the third embodiment.

[0079] In this article, along the Figure 7A The cross-section at the position taken by the line C-C' is shown in Figure 7B middle.

[0080] In the semiconductor module 102 according to the third embodiment, the concavo-convex structure 202 is provided on the surface of the interconnection layer 21 or the surface of the interconnection layer 23 . For example, the concave-convex structure 202 is provided on the side surface 21 sw of the interconnection layer 21 . In addition, a concavo-convex structure 202 is provided on the side surface 23sw of the interconnection layer 23 .

[0081] In the semiconductor module 102, the ground coplanar line consists of the interconnection layer 21 and the interconnection layer 23 provided on the substrate 10 a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Thicknessaaaaaaaaaa
Login to View More

Abstract

According to one embodiment, a semiconductor module includes: a substrate; a first interconnection layer disposed on the substrate; a plurality of first semiconductor elements disposed on the first interconnection layer, the plurality of Each of the first semiconductor elements includes: a first electrode, a second electrode, and a third electrode, and the second electrode is electrically connected to the first interconnection layer; a plurality of first rectifying elements are arranged on the first electrode. On an interconnection layer, each of the plurality of first rectifying elements includes a fourth electrode and a fifth electrode, and the fifth electrode is electrically connected to the first interconnection layer; and a second interconnection layer, disposed on the substrate, and the second interconnection layer is electrically connected to the first electrode and the fourth electrode; wherein the second interconnection layer is on a surface of the second interconnection layer A concavo-convex structure is included, or the first interconnect layer includes a concavo-convex structure on a surface of the first interconnect layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS [0002] This application is based on and claims priority from Japanese Patent Application No. 2014-166634 filed on Aug. 19, 2014; the entire contents of which are incorporated herein by reference. technical field [0003] Embodiments described herein relate generally to semiconductor modules. Background technique [0004] In a semiconductor module, a high breakdown voltage and a high current are realized by connecting an insulated gate bipolar transistor (IGBT) element and a fast recovery diode (FRD) element mounted on a substrate in parallel. [0005] However, multiple loops of current paths are formed in the circuit by connecting in parallel, and each loop has an independent resonant frequency. When the resonance frequency of any loop matches the oscillation frequency of the noise of the IGBT element, resonance occurs in the semiconductor module, and noise is generated. It is possible that noise generated in the semiconduct...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L23/522
Inventor 松山宏
Owner KK TOSHIBA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com