Storage single event multiple bit upset fault-tolerance method and circuit

Abstract

The invention discloses a storage single event multiple bit upset fault-tolerance method and circuit. The storage single event multiple bit upset fault-tolerance method comprises the steps of: when writing data into a storage, encoding input data A<15:0>, generating a check bit P<5:0>, and inputting the check bit P<5:0> and the corresponding input data A<15:0> into the storage; and when reading out data from the storage, respectively reading out storage data A'<15:0> corresponding to the input data A<15:0> and a check bit P'<5:0> corresponding to the check bit P<5:0>, carrying out decoding, generating an error correcting code S<5:0>, and according to the error correcting code S<5:0>, carrying out error correction on the storage data A'<15:0> to obtain final data D<15:0>. According to the storage single event multiple bit upset fault-tolerance method and circuit disclosed by the invention, any two adjacent bits of error data can be corrected; compared with a conventional expansion hamming code, the storage single event multiple bit upset fault-tolerance method and circuit nearly double resistance of the storage to single event multiple bit upset.

Description

technical field [0001] The invention belongs to the field of anti-radiation design and reinforcement of integrated circuits, and in particular relates to a memory single-particle multi-bit flip fault-tolerant method and circuit. Background technique [0002] The single event effect refers to the accumulation of energy by high-energy charged particles passing through the sensitive area of ​​the microelectronic device, generating a sufficient amount of charges, which are collected by the electrodes of the device, causing abnormal changes in the logic state of the device or damage to the device. It is a random effect. In addition to high-energy particles in space, various nuclear radiation and electromagnetic radiation environments are also the main causes of single event effects. Single-event upsets are the most common single-event effect on integrated circuits in irradiated environments, leading to errors in stored data. [0003] The single event upset event caused by high-...

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Problems solved by technology

[0006] Among the current common schemes for radiation-resistant memory hardening, process hardening can effectively reduce the charge collection on the single particle track, but the cost is expensive, there are few process lines to choose from, and the integration is usually about three generations behind the commercial process; the error correction code design In the reinforcement scheme, the extended Hamming code commonly used in memory has weak error correction ability, and it is difficult to meet the reliability requirements of deep submicron technology memory

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