Processor and method for executing matrix multiplication on processor

A processor and matrix technology, applied in the computer field, can solve problems such as limited scale of parallelism, low utilization rate, and limited computing performance, and achieve high versatility, increase parallelism, and speed up processing speed

Active Publication Date: 2017-02-22
BEIJING BAIDU NETCOM SCI & TECH CO LTD
View PDF5 Cites 43 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the matrix multiplication operation involved in the deep learning algorithm often has a small number of rows in the multiplicand matrix or even a single-row matrix, mining parallelism in the M dimension is likely t

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Processor and method for executing matrix multiplication on processor
  • Processor and method for executing matrix multiplication on processor
  • Processor and method for executing matrix multiplication on processor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] The application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain related inventions, rather than to limit the invention. It should also be noted that, for the convenience of description, only the parts related to the related invention are shown in the drawings.

[0024] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and embodiments.

[0025] figure 1 An exemplary system architecture 100 is shown to which an embodiment of a processor or a method for performing a matrix multiplication operation on a processor of the present application may be applied.

[0026] Such as figure 1 As shown, the system archite...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a processor and a method for executing matrix multiplication on the processor. The processor comprises a data bus and an array processor composed of k processing units. The data bus is used for reading n columns of row vectors in sequence from M*N multiplicand matrixes, inputting the row vectors to the processing units in the array processor, reading n*k sub-matrixes from N*K multiplier matrixes, inputting column vectors of the sub-matrixes into the corresponding processing units in the array processor, and outputting results obtained through multiplication executed by the processing units. Each processing unit in the array processor is used for executing parallel vector multiplication on the input row vectors and the column vectors, and each processing unit comprises a Wallace tree multiplying unit composed of n multiplying units and n-1 adders. The implementation mode improves processing efficiency of matrix multiplication.

Description

technical field [0001] The present application relates to the field of computer technology, in particular to the field of computer hardware technology, and in particular to a processor and a method for performing matrix multiplication on the processor. Background technique [0002] Deep learning technology is the core of artificial intelligence and has greatly promoted many applications. The deep learning algorithm is a typical calculation-intensive algorithm, and matrix multiplication, which is the core part of the algorithm, is a calculation- and data-intensive operation. In scenarios that require higher computing efficiency, matrix algorithms usually need to be executed using a dedicated processor based on FPGA or ASIC, which can provide a large number of customized computing and storage resources. If the part of the dedicated processor used to execute the matrix multiplication algorithm can adopt a reasonable computing unit and storage structure, it will greatly reduce ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F9/302G06N20/00
CPCG06F9/3001G06N20/00G06F17/16G06F9/30036G06F9/3887G06F7/00G06F9/3895
Inventor 周妮漆维王勇欧阳剑
Owner BEIJING BAIDU NETCOM SCI & TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap