Implementation method of low-complexity polar code folding hardware architecture based on k-segment decomposition
An implementation method and low-complexity technology, which is applied to coding components, using block codes for error correction/detection, coding, etc., to achieve the effects of improving node resource utilization, reducing hardware complexity, and reducing hardware resource consumption.
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[0030] The technical solution of the present invention will be further introduced below in combination with specific embodiments.
[0031] First introduce the traditional SC decoding algorithm.
[0032] Consider a polar code (N, K, A), where N represents the code length of the polar code, K represents the number of effective information in the polar code, and A represents the set of effective information bits. Let the vector to be decoded received by the receiving end be y i =(y 1 ,...,y N ), the decoding result at the receiving end is expressed as if u i is not valid information bits, we will Zero. Otherwise the decoded bits can be expressed as:
[0033]
[0034] in, The channel transmission probability is defined. The decoding operation uses LLR (log-likelihood ratio) to calculate, and the definition of LLR is as follows:
[0035]
[0036] The algorithm of LLR satisfies the following recurrence relation:
[0037]
[0038] The traditional SC decoder con...
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