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Three-value PUF unit and circuit realized by using CNFET

A power supply and drain technology, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of increasing chip area and increasing excitation response equivalence

Active Publication Date: 2017-06-13
NINGBO UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For binary PUF circuits, increasing the number of stimulus-response pairs will inevitably increase the chip area

Method used

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  • Three-value PUF unit and circuit realized by using CNFET
  • Three-value PUF unit and circuit realized by using CNFET
  • Three-value PUF unit and circuit realized by using CNFET

Examples

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Effect test

Embodiment

[0019] Example: such as figure 1 As shown, a ternary PUF unit realized by CNFET includes a first CNFET tube T1, a second CNFET tube T2, a third CNFET tube T3, a fourth CNFET tube T4, a fifth CNFET tube T5, and a sixth CNFET tube T6 , the seventh CNFET tube T7, the eighth CNFET tube T8, the ninth CNFET tube T9 and the tenth CNFET tube T10; the first CNFET tube T1, the third CNFET tube T3, the fourth CNFET tube T4, the fifth CNFET tube T5, the The seventh CNFET tube T7 and the eighth CNFET tube T8 are all N-type CNFET tubes, the second CNFET tube T2, the sixth CNFET tube T6, the ninth CNFET tube T9 and the tenth CNFET tube T10 are all P-type CNFET tubes; The gate of the tube T1 is connected to the gate of the eighth CNFET tube T8 and its connection end is the word line control signal input end of the ternary PUF unit, the drain of the first CNFET tube T1, the gate of the second CNFET tube T2, The grid of the third CNFET T3, the source of the fifth CNFET T5, the drain of the six...

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Abstract

The invention discloses a three-value PUF unit and circuit realized by using CNFET. The three-value PUF circuit comprises a three-value row decoder, a three-value column decoder, a three-value output circuit and a three-value PUF unit array, the three-value PUF unit array is a 3n row* 3n column matrix formed by arranging 3n*3n three-value PUF units, the three-value PUF unit comprises a first CNFET tube, a second CNFET tube, a third CNFET tube, a fourth CNFET tube,a fifth CNFET tube, a sixth CNFET tube, a seventh CNFET tube, an eighth CNFET tube, a ninth CNFET tube and a tenth CNFET tube tenth; and the three-value PUF unit and circuit has the advantages of realizing a relatively small circuit area on the basis of ensuring a correct logic function, and having relatively good randomness and uniqueness.

Description

technical field [0001] The invention relates to a PUF unit, in particular to a three-valued PUF unit and a circuit realized by CNFET. Background technique [0002] The physical unclonable function (Physical Unclonable Function, PUF) circuit uses the random process deviation in the integrated circuit manufacturing process to generate the key and apply it to the cryptosystem [1] . Due to random process variation, different chips with the same structure will get different output responses under the same excitation. Therefore, although the attacker knows the structure of the PUF circuit, due to the uncontrollable process deviation, it is impossible to clone the PUF circuit with the same output response. The non-cloning feature of PUF circuits makes PUF circuits defend against a variety of traditional attack modes. Pappu et al. first proposed the concept of PUF, and designed optical PUF to realize applications such as system authentication. Then Gassend et al. proposed a PUF ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/32
CPCH04L9/3278G09C1/00H01L23/576H10K19/10
Inventor 汪鹏君龚道辉张会红康耀鹏
Owner NINGBO UNIV
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