A three-dimensional memory readout circuit and readout method

Abstract

The invention provides a three-dimensional memory readout circuit and a readout method, comprising: a read reference circuit for generating a read reference current capable of quickly distinguishing between reading a low-resistance state cell current and a high-resistance state cell current; and a sensitive amplifier. The reading reference circuit includes a reference unit, a bit line matching module, a word line matching module and a transmission gate parasitic parameter matching module. The invention aims at the parasitic effect and electric leakage of the three-dimensional memory in the plane and vertical directions, introduces the matching of the parasitic parameters of the bit line, electric leakage and transmission gate in the reading reference current, and introduces the matching of the parasitic parameters of the current mirror in the reading current, eliminating Pseudo-read phenomenon reduces the read-out time; and has a wide range of applications and a high read-out accuracy rate.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a three-dimensional memory readout circuit and a readout method. Background technique [0002] Integrated circuit memory is widely used in industrial and consumer electronics products, and can be divided into volatile memory and non-volatile memory according to whether the memory can be stored when power is off. Non-volatile memory includes flash memory (flash memory), magnetic memory (magnetoresistive random-access memory, MRAM), resistive random-access memory (resistance random-access memory, RRAM), phase change memory (phase change memory, PCM), etc. Phase-change memory is a memory based on the Ovsinski electronic effect proposed by Ovsinski in the late 1960s. Different resistance states in the high resistance state (amorphous state) are used to store data. Magnetic memory and RRAM also use different resistance states of materials or devices in low resistance sta...

AI Technical Summary

Problems solved by technology

[0004] Three-dimensional memory is different from two-dimensional memory. In two-dimensional memory, parasitic devices are mainly in the plane direction, while in three-dimensional memory, parasitic devices exist in both vertical and plane directions. The number and complexity of parasitic parameters in three-dimensional memory are far greater than Two-dimensional memory; at the same time, the three-dimensional memory adopts a new type of gating device, which needs to increase the unselected bit line and unselected word line. The bias method of the three-dimensional memory is completely different from that of the two-dimensional memory, and the complexity is higher; in addition, due to The unique biasing method of 3D memory will cause leakage current

[0010] Four, leakage

If the leakage of the half-gated memory cell is small (such as 5pA), the leakage will cause false reading and affect the reading speed

[0011] Therefore, how to improve the above-mentioned long reading time and how to improve the speed characteristics of the three-dimensional memory has become a technical problem to be solved urgently by those skilled in the art.

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