Embedded system
A system bus and data writing technology, applied in the computer field, can solve problems such as program data storage security, and achieve the effect of safe storage and protection from being stolen
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Embodiment 1
[0042] figure 1 A schematic structural diagram of an embedded system provided by Embodiment 1 of the present invention, such as figure 1 As shown, the embedded system provided by this embodiment includes: a flash memory controller 110, a central processing unit (CPU) 120 and a flash memory chip 130, and the flash memory controller 110 is connected to the CPU 120 and the flash memory chip 130 respectively, wherein the CPU 120 It is used to control the operation of the flash memory controller 110 and the flash memory chip 130; the flash memory chip 130 is readable and rewritable, and the stored data information will not be lost when the power is turned off.
[0043]The flash memory controller 110 is configured on the main chip of the embedded system, and the main chip and the flash memory chip can be manufactured in the same package by using MCP (Multiple Chip Package) technology to form an embedded system.
[0044] The flash memory controller 110 is used for exchanging state i...
Embodiment 2
[0052] figure 2 A schematic structural diagram of an embedded system provided in Embodiment 2 of the present invention, such as figure 2 As shown, this embodiment provides a preferred implementation solution of the flash memory controller 210 on the basis of the foregoing embodiments.
[0053] The flash memory control unit 211 includes: a key register 2111 , an instruction translation subunit 2112 , an address translation subunit 2113 , a data encryption subunit 2114 , an interface conversion subunit 2115 and a data decryption subunit 2116 .
[0054] The key register 2111 is used to store the encryption key and the decryption key.
[0055] The key register 2111 is connected with the flash memory chip 220, and is used for automatically reading the encryption key and the decryption key from the flash memory chip 220 after the system is powered on, and storing them. Further, the encryption key and the decryption key stored in the key register 2111 may be pre-configured. The ...
Embodiment 3
[0067] image 3 A schematic structural diagram of a flash memory control unit provided in Embodiment 3 of the present invention, as shown in image 3 As shown, this embodiment provides a preferred implementation solution of an encryption key on the basis of the foregoing embodiments.
[0068] The encryption key may include: an address encryption key and a data encryption key;
[0069] The data encryption subunit 3111 is specifically configured to receive the program data sent by the flash memory system bus interface 312, obtain the data encryption key stored in the key register 3112, and use the data encryption key to encrypt the received program data. The program data is encrypted to obtain the ciphertext of the program data.
[0070] The flash memory control unit 311 preferably also includes:
[0071] The address encryption subunit 3113 is respectively connected to the address translation subunit 3114, the key register 3112 and the interface conversion subunit 3115, and i...
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