Chip package and manufacturing method thereof
A technology for a chip package and a manufacturing method, which is applied in the manufacturing of semiconductor/solid-state devices, electric solid-state devices, semiconductor devices, etc., can solve the problem of limited range capability, contamination of image sensing area, and difficulty in wafer movement of ball grid arrays, etc. question
Inactive Publication Date: 2017-07-07
XINTEC INC
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Problems solved by technology
[0003] In the process of making image sensors, if the wafer that has not been cut into multiple wafers is not provided with glass sheets, when the thickness of the wafer is relatively thin, the process capability will be limited, so that the wafer with ball grid array It is quite difficult to move
In addition, the image sensing area is also prone to contamination during the manufacturing process, which makes it difficult to improve the yield rate
Method used
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[0026] A number of embodiments of the present invention will be disclosed in the following figures. For the sake of clarity, many practical details will be described together in the following description. It should be understood, however, that these practical details should not be used to limit the invention. That is, in some embodiments of the present invention, these practical details are unnecessary. In addition, for the sake of simplifying the drawings, some known and commonly used structures and elements will be shown in a simple and schematic manner in the drawings.
[0027] figure 1 A cross-sectional view of a chip package 100a according to an embodiment of the present invention is shown. As shown in the figure, the chip package 100 a includes a chip 110 a , spacer elements 120 and height increasing elements 130 . Wherein, the chip 110 a has an image sensing area 112 and a first surface 114 and a second surface 116 opposite to each other. The image sensing area 112 ...
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A chip package includes a chip, a dam element, and a height-increasing element. The chip has an image sensing area, a first surface, and a second surface opposite to the first surface. The image sensing area is located on the first surface of the chip. The dam element is located on the first surface of the chip and surrounds the image sensing area. The height-increasing element is located on the dam element, such that the dam element is between the height-increasing element and the chip. Interference due to receiving mess light from the external by the image sensing area can be avoided and flare generation is prevented.
Description
technical field [0001] The invention relates to a chip package and a method for manufacturing the chip package. Background technique [0002] When manufacturing a chip package of an image sensor (such as a CMOS chip), a glass sheet is usually covered on the surface of the chip to protect the image sensing area of the chip. In a known chip package with a glass sheet, since the thickness of the spacer element between the chip and the glass sheet is equivalent to the distance between the glass sheet and the chip, which is only about 40 μm to 45 μm, when the image sensing area receives an image , prone to glare problems (flare issue). [0003] In the manufacturing process of the image sensor, if the wafer that has not been cut into multiple wafers does not have a glass sheet, when the thickness of the wafer is relatively thin, the process capability will be limited, so that the wafer with the ball grid array It is quite difficult to move. In addition, the image sensing area...
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IPC IPC(8): H01L27/146
CPCH01L27/146H01L27/14601H01L27/14683H01L27/14618H01L2224/13101H01L24/13H01L2924/16235H01L23/481H01L2924/014H01L2924/00014H01L24/08H01L24/03H01L21/563H01L2224/0237H01L2224/0231
Inventor 吴俊良林佳升李柏汉何彦仕
Owner XINTEC INC