Synchronization method for signal source based on multi-DAC parallel structure
A signal source and signal technology, applied in the direction of synchronization device, synchronization information channel, multiplexing communication, etc., can solve the problems of inability to quickly achieve synchronization, low synchronization accuracy, complex related algorithm operations, etc., to achieve high synchronization accuracy, saving Cost, effect of simplified synchronization structure
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[0045] For the convenience of description, the relevant technical terms appearing in the specific implementation are explained first:
[0046] DAC (Digital-to-Analog Converter): digital-to-analog converter;
[0047] MUX (multiplexer): multiplexer;
[0048] figure 2 It is a structural block diagram of a synchronous model of a signal source based on a multi-DAC parallel structure in the present invention.
[0049] In this example, if figure 2 Shown, the signal source based on multi-DAC parallel structure of the present invention is mainly by clock generator, data source (data generation module and latch), multiplexer (MUX module), digital-to-analog converter, data clock discriminator It consists of a phase module and a data processing module. The system provides the same phase sampling clock for each channel, and then performs phase detection on the data clock obtained by frequency division of the sampling clock of each channel, and adjusts the input waveform data accordin...
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[0071] Take the 4:1 MUXDAC (k=2, m=2, n=4) in DDR mode as an example, image 3 A timing diagram showing the relationship between the waveform data output by the data source when the initial phases of the data clocks are different. As shown in the figure, since the initial phases of the data clocks obtained by frequency division of the sampling clock are different, the waveform data output by the data clocks with different initial phases are controlled to be out of sync, that is, differ by the corresponding sampling period. Among them, Sample_CLK represents the sampling clock, Data_CLK / 0°-Data_CLK / 270° represents the data clock whose initial phases are 0°, 90°, 180° and 270° after the sampling clock is divided by 4, and Data / 0°-Data / 270° respectively represent the waveform data obtained by using data clocks with different initial phases, i 1 The number of data points representing the difference between different waveform data.
[0072] Such as image 3 As shown, the data cl...
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