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Synchronization method for signal source based on multi-DAC parallel structure

A signal source and signal technology, applied in the direction of synchronization device, synchronization information channel, multiplexing communication, etc., can solve the problems of inability to quickly achieve synchronization, low synchronization accuracy, complex related algorithm operations, etc., to achieve high synchronization accuracy, saving Cost, effect of simplified synchronization structure

Active Publication Date: 2017-08-29
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The appeal synchronization method has reference significance for solving the problem of random phase in the process of clock frequency division, but the related algorithm cannot quickly achieve synchronization due to the complexity of the operation
Swallow pulse method requires too much additional hardware, resulting in low synchronization accuracy

Method used

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  • Synchronization method for signal source based on multi-DAC parallel structure
  • Synchronization method for signal source based on multi-DAC parallel structure
  • Synchronization method for signal source based on multi-DAC parallel structure

Examples

Experimental program
Comparison scheme
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Embodiment

[0045] For the convenience of description, the relevant technical terms appearing in the specific implementation are explained first:

[0046] DAC (Digital-to-Analog Converter): digital-to-analog converter;

[0047] MUX (multiplexer): multiplexer;

[0048] figure 2 It is a structural block diagram of a synchronous model of a signal source based on a multi-DAC parallel structure in the present invention.

[0049] In this example, if figure 2 Shown, the signal source based on multi-DAC parallel structure of the present invention is mainly by clock generator, data source (data generation module and latch), multiplexer (MUX module), digital-to-analog converter, data clock discriminator It consists of a phase module and a data processing module. The system provides the same phase sampling clock for each channel, and then performs phase detection on the data clock obtained by frequency division of the sampling clock of each channel, and adjusts the input waveform data accordin...

example

[0071] Take the 4:1 MUXDAC (k=2, m=2, n=4) in DDR mode as an example, image 3 A timing diagram showing the relationship between the waveform data output by the data source when the initial phases of the data clocks are different. As shown in the figure, since the initial phases of the data clocks obtained by frequency division of the sampling clock are different, the waveform data output by the data clocks with different initial phases are controlled to be out of sync, that is, differ by the corresponding sampling period. Among them, Sample_CLK represents the sampling clock, Data_CLK / 0°-Data_CLK / 270° represents the data clock whose initial phases are 0°, 90°, 180° and 270° after the sampling clock is divided by 4, and Data / 0°-Data / 270° respectively represent the waveform data obtained by using data clocks with different initial phases, i 1 The number of data points representing the difference between different waveform data.

[0072] Such as image 3 As shown, the data cl...

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Abstract

The invention discloses a synchronization method for a signal source based on a multi-DAC parallel structure. A data clock acquired by performing sampling clock frequency division on each channel is sent to a data clock phase demodulation module, the data clock of any channel is used as a reference clock, frequency multiplication is performed on the reference clock to acquire a related clock, the data clock of each channel is collected by a falling edge of the related clock to acquire a corresponding related signal, a phase difference between the data clock of each channel and the reference data clock is acquired according to a derivation formula between the related signal and the phase difference, the phase difference acquired by phase demodulation is fed back to a data processing module, relative delay between waveform data of each channel is acquired by related operation in the data processing module, and at last, leading or lagging treatment is performed on the waveform data output by each channel data generation module, so that the waveform data of each channel is synchronized, and finally synchronization of the output waveform of each channel is finally ensured.

Description

technical field [0001] The invention belongs to the technical field of arbitrary waveform synthesis, and more specifically relates to a method for synchronizing signal sources based on a multi-DAC parallel structure. Background technique [0002] Arbitrary waveform synthesis technology is a means for generating complex electronic signals such as specified parameters or custom shapes. It is widely used in communication, radar and other fields, and is one of the most important core technologies in the development of the electronics industry. In the field of communication, Veyrac et al. studied the application of arbitrary waveform synthesis method to the signal transmission of 5G handheld devices. In the field of radar, Gupta summarized the important role of arbitrary waveform synthesis technology in radar signal simulation and performance evaluation. Bales et al. proposed a new structure to quickly realize the generation of modulated signals on FPGA. [0003] In recent years...

Claims

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Application Information

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IPC IPC(8): H04J3/06H04L7/00H03M1/66
CPCH03M1/662H04J3/0617H04L7/0008H04L7/0016
Inventor 肖寅东杨兴刘科田书林郭广坤黄建国王厚军
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA