Input and output receiving circuit
A receiving circuit, input and output technology, applied in the field of semiconductor integrated circuits, can solve the problems of not being able to reach the working power supply voltage VDD1 of the input and output receiving circuit, reducing the speed of the input and output receiving circuit, and the performance of the input and output receiving circuit.
Active Publication Date: 2021-03-09
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
[0004] However, in the input-output receiving circuit of the prior art, the maximum value of the signal voltage at node B is VDD1-Vthn, which cannot reach the working power supply voltage VDD1 of the input-output receiving circuit, which reduces the speed of the input-output receiving circuit and the input-output receiving circuit. performance
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[0033] As mentioned in the Background Art, refer to figure 1 , in the input-output circuit of the prior art, the maximum value of the node B voltage is VDD1-Vthn, which cannot reach the power supply voltage VDD1 of the input-output receiving circuit, which reduces the speed of the input-output receiving circuit and the performance of the input-output receiving circuit.
[0034] In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0035] In the embodiment of the present invention, by setting the compensation unit, no external signal driver is needed at the receiving end, so that the maximum value of the drain signal voltage of the first NMOS transistor reaches the working power supply voltage of the input and output circuit, the circuit structure is simple, and the external high voltage signal input ...
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The invention relates to an input / output receiving circuit comprising a receiving terminal, a first NMOS tube, a shaping circuit, and a compensation unit. The receiving terminal is coupled with an external voltage. A source electrode of the first NMOS tube is coupled with the receiving terminal and a gate is coupled with a first power supply voltage. An input terminal of the shaping circuit is coupled to the first power supply voltage and a drain of the first NMOS tube and the shaping circuit is used for realizing shaping of a drain signal of the first NMOS tube. The input terminal of the compensation unit is coupled with the first power supply voltage, the ground and the receiving terminal and the output terminal is coupled with a drain of the first NMOS tube; and the compensation unit is used for compensating the drain signal of the first NMOS tube, so that the maximum value of the drain signal voltage of the first NMOS tube can reach the first power supply voltage. The performance of the input / output receiving circuit can be improved.
Description
technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to an input and output receiving circuit. Background technique [0002] The input-output (I / O) receiving circuit (receiver) is an interface circuit for signal interaction inside and outside the chip, and its main function is to receive digital / analog signals. In some application environments, the signal voltage outside the chip is higher than the power supply voltage inside the chip. Therefore, a withstand voltage circuit is usually designed in the I / O receiving circuit to protect the I / O receiving circuit. [0003] An input and output receiving circuit of the prior art such as figure 1 As shown, the receiving end receives the signal from the port PAD. The voltage Vin of the port PAD is higher than the power supply voltage VDD1 for the receiving circuit to work. If the signal of the port PAD is directly transmitted to the node B, the high voltage will cause devic...
Claims
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IPC IPC(8): H03K19/0185
CPCH03K19/018507
Inventor 莫善岳陈捷李芳马晓媛聂鑫
Owner SEMICON MFG INT (SHANGHAI) CORP