timing difference measurement

Abstract

Disclosed herein is a current mode circuit for measuring a timing difference between a first signal and a second signal, the circuit comprising: a tail node configured to receive current pulses from the first signal during a measurement operation; A first node and a second node, the first node and the second node can be conductively connected to the tail node along the corresponding first path and the second path; a steering circuit, which is configured during the measurement operation based on the second signal to control such connection between the tail node and the first node and the second node so that the current pulse is directed according to the timing difference between said first signal and the second signal such that the first part of the current pulse is along the first a path and a second portion of the current pulse is passed along the second path; and a signal output unit configured to output a measured value indicative of the timing difference based on one or both of the first portion and the second portion Measurement result signal.

Description

technical field [0001] The present invention relates to circuits for measuring timing differences between signals, eg, circuits used in phase-locked loops or phase detector / comparators of phase-locked loop (PLL) circuits. Background technique [0002] figure 1 is a schematic diagram of an example PLL circuit 1. The PLL circuit 1 includes a reference clock (REFCLK) source 2 , a phase comparator 4 , a charge pump 6 , a loop filter 8 , a voltage controlled oscillator (VCO) 10 , a clock control circuit 12 and a divider 14 . [0003] A charge pump 6 is connected to be controlled by the output of the phase comparator 4 . The output of charge pump 6 controls VCO 10 after being filtered by loop filter 8 . VCO 10 converts one or more clock signals (in figure 1 In the case of , four clock signals) are output to the clock control circuit 12. One or more clock signals (VCOCLK) output from VCO 10 are also fed back via distributor 14 as clock signal VCODIV to a phase comparator, whic...

AI Technical Summary

Problems solved by technology

Of course, this will affect the operation of the clock control circuit 12

[0009] Known circuits used in phase detectors have been found to be inaccurate for some applications, especially high frequency applications

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