Semiconductor field-effect transistor and fabrication method thereof
A technology for field effect transistors and manufacturing methods, which is applied in the field of semiconductor chip manufacturing technology, can solve the problems of switching loss and low work efficiency, and achieve the effects of reducing switching loss, improving work efficiency, and reducing gate-to-drain capacitance
Inactive Publication Date: 2017-11-24
PEKING UNIV FOUNDER GRP CO LTD +1
View PDF2 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0005] The technical problem to be solved by the present invention is to provide a semiconductor field effect transistor and its manufacturing method, which are used to solve the problems of switching loss and low working efficiency of the existing VDMOS devices
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0051] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
[0052] Aiming at the problems of switching loss and low working efficiency of the existing VDMOS devices, the invention provides a semiconductor field effect transistor and a manufacturing method thereof.
[0053] like figure 2 As shown, the manufacturing method of the semiconductor field effect transistor of the embodiment of the present invention includes:
[0054] Step 10, forming a first silicon oxide layer in the groove of the silicon wafer;
[0055] Step 20, covering the first polysilicon layer on the first silicon oxide layer, and filling the trench with the first polysilicon layer;
[0056] Step 30, etching the first silicon oxide layer and the first polysilicon layer, and retaining the first silicon oxide layer and the first polysilicon ...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention provides a semiconductor field-effect transistor and a fabrication method thereof. The fabrication method of the semiconductor field-effect transistor comprises the steps of forming a first silicon oxide layer in a groove of a silicon wafer; covering the first silicon oxide layer with a first poly-silicon layer, wherein the groove is filled with the first poly-silicon layer; etching the first silicon oxide layer and the first poly-silicon layer, and reserving the first silicon oxide layer and the first poly-silicon layer with a preset depth; forming a second silicon oxide layer in the groove and an outer surface of the groove; filling a second poly-silicon layer in the groove wrapped by the second silicon oxide layer; and filling the silicon wafer with a medium and metal to form the semiconductor field-effect transistor. With the semiconductor field-effect transistor fabricated by the mode, the switch loss of the semiconductor field-effect transistor is reduced, and the working efficiency is improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor chip manufacturing technology, in particular to a semiconductor field effect transistor and a manufacturing method thereof. Background technique [0002] The drain and source poles of the vertical double diffused metal oxide semiconductor field effect transistor (VDMOS) are on both sides of the device, so that the current flows vertically inside the device, which increases the current density, improves the rated current, and the on-resistance per unit area is also lower. Small, is a very versatile power device. The most important performance parameter of VDMOS is the operating loss, which can be divided into three parts: conduction loss, cut-off loss and switching loss. The conduction loss is determined by the conduction resistance, the cut-off loss is affected by the magnitude of the reverse leakage electrode current, and the switching loss refers to the loss caused by the charging and dis...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/423
CPCH01L29/66734H01L29/4236H01L29/7813
Inventor 李理马万里赵圣哲
Owner PEKING UNIV FOUNDER GRP CO LTD