Buffer improvement method oriented to page-level FTL (Flash translation layer)

Abstract

The invention discloses a buffer improvement method oriented to s page-level FTL (Flash translation layer). The buffer improvement method comprises the following steps that: 1: dividing an RAM (Random Access memory) into a request type distinguishing module, a random request processing area module and a continuous request processing area module; 2: judging a type which achieves the request by the request type distinguishing module, and processing by the corresponding request processing area module; 3: if the data page of the request is in the RAM, immediately obtaining service, during service, judging the read-write type of the request, if the request is a write request, carrying out data coverage in the buffer, and otherwise, directly reading data from the buffer; 4: when a data page in the continuous request processing module is subjected to secondary access, loading the data page into the random request processing module; and 5: when the random request processing area module is full, according an LRU (Least Recently Used) strategy, carrying out ejection by taking a cluster as a unit, and when the continuous request processing area module is full, according to an FIFO (First In First Out) strategy, carrying out ejection by taking the cluster as the unit. The method is high in practicality and has a good application prospect.

Description

technical field [0001] The invention belongs to the technical field of solid-state disk algorithm design, and discloses a page-level FTL-oriented buffer improvement method. Background technique [0002] Buffer algorithm design is a very critical issue in SSD firmware design, especially for mid-to-high-end SSD performance and life optimization, buffer algorithm design plays a vital role. Since data access has high temporal locality and spatial locality, the buffer algorithm design can cache frequently accessed data in the buffer to reduce direct access to flash memory and improve CPU read and write efficiency. [0003] Data replacement strategy is a key issue in buffer algorithm design. In the traditional page-level replacement strategy, the replacement granularity is 1 page. The advantage of the page-level replacement strategy is that the access characteristics of each page can be distinguished in a fine-grained manner, and the buffer hit rate is higher. The disadvantage i...

AI Technical Summary

Problems solved by technology

If continuous requests with low access frequency are cached in the buffer, buffer pollution will be caused, that is, data without time locality will occupy valuable storage space, resulting in a decrease in the space utilization of the buffer

However, the effect of directly sending continuous requests to FTL for processing is not good, because there is a phenomenon that a certain data in a continuous request is accessed twice, or even multiple times.

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