A dual-port ram anti-collision method based on programmable logic

Abstract

The invention discloses a programmable logic-based double-port RAM conflict prevention method. The method is applied to a double-port RAM slave end, and comprises the following steps of: when a slave end CPU accesses a double-port RAM, if a master end also accesses the double-port RAM, immediately cutting off a control signal of the slave end through logic so as to ensure safety access of the master end; marking an access conflict in the logic; after each reading of the slave end, judging whether a conflict occurs or not through reading a mark in the logic; and if the conflict occurs, discarding the data and re-initiating reading and writing. According to the method, only logic and software of a CPU at one side are changed, and software and hardware of a CPU at the other side do not need any change, so that a new scheme is provided for the traditional double-port conflict prevention mechanism.

Description

technical field [0001] The invention belongs to the field of processor data exchange Background technique [0002] With the development of electronic technology, the complexity of the system is getting higher and higher, and multiple processors are often required to work together to realize product functions. Dual-port RAM is a dual-port volatile memory widely used in data exchange between multiple CPUs. Generally, each dual-port RAM has two completely independent ports, and each port has its own data line, address line, and control line. However, when the CPUs at both ends of the dual-port RAM perform read and write operations on a storage unit at the same time, conflicts will occur in the dual-port RAM, resulting in errors in reading and writing data. [0003] The anti-collision mechanism currently used mainly relies on the anti-collision mechanism provided by the dual-port RAM chip, which mainly includes: [0004] 1) Insert the anti-collision mechanism of the waiting st...

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Problems solved by technology

[0009] 1) The mechanism of the BUSY signal is adopted, and the memory access mechanism of the CPU at both ends of the dual port must support this insertion waiting mechanism, but in the actual use process, many CPUs do not support this memory access waiting insertion mechanism;

[0010] 2) The semaphore mechanism is adopted, and the CPU software at both ends of the dual port must formulate a communication protocol, such as the number of semaphores and the division of the storage area controlled by each semaphore. The CPUs at both ends of the dual port are often in different modules. In some transformation projects, it often happens that the state of one side of the CPU has been fixed, and the software and hardware cannot be changed. Only the software and hardware of the other side of the CPU can be changed. If the semaphore mechanism is not used or agreed upon in the old state, then During the transformation process, the semaphore-based anti-collision mechanism cannot be used

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