A Method for Improving the Stability of Floating Gate Parallel Capacitance

Abstract

The present invention proposes a method for improving the stability of floating gate parallel capacitance, comprising the following steps: forming a tunnel oxide layer on the surface of a semiconductor substrate; forming a floating gate layer on the tunnel oxide layer; forming a floating gate layer on the floating gate An insulating ONO dielectric layer is formed on the insulating ONO dielectric layer; a control gate layer is formed on the insulating ONO dielectric layer, wherein the floating gate layer and the tunnel oxide layer, and the floating gate layer and the insulating ONO dielectric layer are connected in parallel to form a capacitance area, and the capacitance area is not The etching-back process of the shallow trench isolation area in the storage area is carried out, so that the capacitance is not affected by the non-uniformity of the height of the floating gate and the depth of the etching-back. Since the impact of the etching back process on the floating gate and the shallow trench isolation area is eliminated, the parallel capacitance structure using the floating gate can obtain better resistance to process fluctuations, improve the stability of the capacitance, and make the circuit work more accurate. .

Description

technical field [0001] The invention relates to the field of semiconductor flash memory devices, and in particular to a method for improving the stability of floating gate parallel capacitance. Background technique [0002] Flash memory has been widely used as the best choice for non-volatile memory applications due to its advantages of high density, low price, and electrical programmability and erasability. Some capacitor structures need to be used in flash memory. Now capacitors include diodes and MOS capacitors. These capacitors are composed of different types of devices (for 1.8V and 5V device areas in flash memory, the potential of 1.8V or 5.0V devices will be used Well and source and drain regions are combined). At present, with the requirement for small-sized chips, it is necessary to reduce the area of ​​each circuit element. At present, it is proposed to use the tunnel oxide layer between the floating gate and the substrate in the flash memory unit and the connecti...

AI Technical Summary

Problems solved by technology

The fluctuation of the process will affect the value of the capacitance. For the circuit sensitive to the capacitance, the influence is greater, and it needs to be improved.

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