Multi-core DSP starting method

Abstract

The invention discloses a multi-core DSP starting method. The method comprises the steps of S1, arranging an ROM region in a multi-core DSP chip, loading a pre-established start loading program in theROM region, and configuring a peripheral needed to be adopted during chip starting and a starting mode needed to be adopted by the peripheral through a starting mode register, wherein the start loading program comprises multiple starting modes, used for starting the multi-core DSP chip, of multiple peripherals; and S2, after the chip is reset, executing the start loading program by a main core, reading the starting mode register, obtaining the target peripheral needed to be adopted currently and the target starting mode needed to be adopted, loading a user program, and after loading of the user program is finished, enabling other cores to jump to a specified address for starting executing respective user programs in an interrupt mode. The multi-peripheral and multi-mode multi-core DSP starting can be realized; the memory utilization rate and efficiency are high; the application range is wide; and the flexibility is good.

Description

technical field [0001] The invention relates to the technical field of multi-core DSP chips, in particular to a method for starting a multi-core DSP. Background technique [0002] The DSP chip generally runs at a high speed, and the application program in its RAM is also running at a high speed. When the system is powered off, the running program will disappear, and the application program must be reloaded into the RAM to start running again. The DSP chip must complete the process of reloading the application program to the kernel, that is, the startup process of the DSP chip. The DSP startup unit is mainly used to move the user application program from the off-chip storage space to a certain storage area on the chip when the chip is powered on. The application program can be stored in a non-volatile storage medium, such as stored in the ROM of the DSP. , and then moved to the high-speed storage area for execution. [0003] Multiple processor cores and a large number of pe...

AI Technical Summary

Problems solved by technology

However, the loading process of the startup program of the single-core DSP chip is simple. The loading of the startup program is mainly carried out by the ROM code solidified inside the chip, and the ROM capacity is small, and it can only load user programs that do not exceed 1KB at a time. If the startup program exceeds 1KB , you must perform a second startup load on the original basis

[0005] The startup program of the multi-core DSP chip needs to depend on the architecture of the CPU and the specific embedded board-level configuration. For different hardware, it must be modified accordingly, which requires that the internal ROM area of ​​the chip is erasable. In this way, the ROM code needs to be modified in real time, but this will make the development difficult and complicated

The current multi-core DSP startup method sets a variety of data formats, including parameter tables, configuration tables, etc., so it is necessary to use a variety of different conversion tools for format conversion. At the same time, due to different formats, there will be differences in storage addresses and functions. For example, some multi-core startup methods use the parameter table format to save the configuration information of the off-chip startup mode pins in the L2 SRAM of the main DSP core, and read and modify it according to the requirements during startup. Therefore, the format, storage location and function Each is different, which will lead to a complicated process of generating the startup program, requiring additional format conversion tools and the jumping process of multi-core loading, which wastes storage space and increases startup delays resulting in waste of power consumption

[0006] To sum up, both single-core DSP and multi-core DSP use a fixed startup mode, which has poor flexibility, and the size of the single-core DSP startup program is limited. There are problems such as memory waste and low efficiency during multi-core startup. It is urgent to provide a A startup method suitable for multi-core DSP chips, so that the flexibility, efficiency and memory utilization of multi-core DSP chips can be improved

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