Manufacturing method of semiconductor structure

Abstract

The invention relates to a manufacturing method of a semiconductor structure. The method includes the following steps that: a substrate and discrete fins on the substrate are provided, the extending direction of the fins is a first direction, and a direction perpendicular to the first direction is a second direction; an initial isolation layer between the fins is formed on the substrate and includes a first initial isolation layer for achieving the isolation of the fins in the first direction; part of the first initial isolation layer is removed by a certain thickness, so that a first isolation layer is formed, and the top of the first isolation layer is lower than the tops of the fins, and a trench is formed between the fins; a second isolation layer filling the trench is formed; protective sidewalls are formed on the sidewalls of the second isolation layer which are higher than the tops of the fins; and part of a second initial isolation layer and the second isolation layer are removed by a certain thickness. According to the manufacturing method of the semiconductor structure of the invention, the protective sidewalls are formed on the sidewalls of the second isolation layer which are higher than the tops of the fins, and therefore, when part of the second isolation layer is removed by a certain thickness, the protective sidewalls can protect the sidewalls of the second isolation layer, and therefore, the problem of the formation of protrusion defects of the second isolation layer because of insufficient lateral etching can be avoided.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for manufacturing a semiconductor structure. Background technique [0002] With the continuous development of semiconductor process technology, the development trend of semiconductor process nodes following Moore's Law continues to decrease. In order to adapt to the reduction of the process node, the channel length of the MOSFET field effect tube has to be shortened. The shortening of the channel length has the advantages of increasing the die density of the chip and increasing the switching speed of the MOSFET field effect tube. [0003] However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so that the control ability of the gate to the channel becomes worse, resulting in the phenomenon of subthreshold leakage, namely So-called short-channel effects (SCE: short-channel effects) are more l...

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Problems solved by technology

[0006] However, even with the introduction of stress layers in the FinFET fabrication process, the electrical performance of state-of-the-art semiconductor devices is still poor

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