21results about How to "Improve formation quality" patented technology

The invention discloses metal flange casting equipment and a casting method for eliminating surface air holes, and relates to the technical field of flange casting. A power device serves as a main power source and is used for driving a forming device to move and conducting automatic demolding at the same time, and a material taking mechanical arm is arranged on one side of a rack; auxiliary demolding is carried out through a material taking mechanical arm, temperature adjustment is carried out before and after molten metal injection, and local temperature rise is carried out through a temperature adjusting device before injection; after injection is completed, cooling forming is carried out through a temperature adjusting device, automatic demolding is carried out after forming is completed, the upper mold is used for installing an injection pipe and an air guide pipe through a drainage groove, the air guide pipe is communicated with a negative pressure air source and used for compensating air pressure fluctuation in a flange cavity, and injection metal liquid splashing, air inclusion and surface air hole forming are prevented.

The invention discloses a semiconductor device and a preparation method thereof, a power module, a power conversion circuit and a vehicle. The semiconductor device comprises a semiconductor structure, the semiconductor structure comprises a semiconductor body and a first dielectric layer, and the first dielectric layer is located on one side of the semiconductor body; a trimming conductive contact hole is formed in the first dielectric layer, and an opening, close to one side of the semiconductor body, of the trimming conductive contact hole is smaller than an opening, away from one side of the semiconductor body, of the trimming conductive contact hole; the conductive layer is located on the side, away from the semiconductor body, of the first dielectric layer, fills the trimming conductive contact hole and penetrates through the trimming conductive contact hole to be electrically connected with the semiconductor structure. According to the technical scheme provided by the embodiment of the invention, the filling quality of the conductive layer in the conductive contact hole is improved.

The invention discloses a solar cell, a photovoltaic module and a semiconductor substrate, and relates to the technical field of photovoltaics, so that a passivation layer has a good passivation effect on the semiconductor substrate. Meanwhile, the contact performance of the doped semiconductor layer and the electrode and the shaping of the electrode are improved, and the conversion efficiency of the solar cell is improved. The solar cell comprises a semiconductor substrate and a passivation layer. The semiconductor substrate has a first surface and a second surface opposite to each other. At least one of the first surface and the second surface is a target surface. The passivation layer is disposed on the target surface. And one side of the passivation layer away from the semiconductor substrate is provided with a plurality of tower footing-like texture structures which are recessed towards the passivation layer. Wherein each tower footing-like texture structure is defined by a polygon-like bottom surface and side surfaces. In the same tower footing-like texture structure, at least one corner of the polygon-like bottom surface is provided with a plurality of protrusions climbing in the extension direction of the side ridge, and the protrusions on the same corner are provided with fluctuating shapes extending in the direction parallel to the polygon-like bottom surface.

The invention relates to a wafer generation method, in particular to a method and equipment for generating a wafer through SiC crystal ingot laser lift-off. According to the method, by adjusting the rotation angle of the SiC ingot and the scanning direction of the laser beam, the scanning direction of the laser beam deviates from a specific angle range relative to the main cut edge, so that the formation of a modified layer and the propagation path of cracks are improved, the residual wafer defects are reduced, and the qualified rate of finished products is improved.

The invention discloses ZnO-based voltage-sensitive semiconductor ceramic as well as a preparation method and application thereof, and belongs to the technical field of semiconductor ceramic. The ZnO-based voltage-sensitive semiconductor ceramic provided by the invention is prepared from the following components: ZnO, Bi2O3, MnO2, Co3O4, Cr2O3, Sb2O3, Al (NO3) 3, a disulfide bond organic silicon cross-linking agent, a photothermal conversion agent, a photoinitiator, a dispersing agent and a solvent I. The ZnO-based voltage-sensitive semiconductor ceramic has the characteristics of continuous thickness and uniform components, the voltage gradient and the nonlinear coefficient of the ZnO-based voltage-sensitive semiconductor ceramic are superior to those of a traditional product, the parameter drift rate after surge impact is small, and the ZnO-based voltage-sensitive semiconductor ceramic can be applied to high-end application scenes such as vehicle-mounted chargers of new energy automobiles.

The invention discloses a flexible three-dimensional hard carbon material and a preparation method and application thereof.The method comprises the steps that polyamide acid sol is synthesized in situ, then a nickel net is evenly coated with the polyamide acid sol, and faint yellow polyimide, namely a polyimide-nickel net composite material, is formed through thermal imidization after drying; the composite material is dried after being subjected to a nickel net removing procedure, finally, the flexible three-dimensional hard carbon material is obtained through carbonization, the method is easy to operate and efficient in reaction, the three-dimensional net structure is obtained, and the material has good capacity performance, rate performance and cycling stability.

The invention discloses a trench isolation structure, a preparation method thereof and a semiconductor device, and the preparation method comprises the steps: providing a semiconductor substrate which comprises a trench; at least the interior of the groove is filled with a sacrificial layer, and the filled sacrificial layer exposes a part of height of the side wall of the groove in the depth direction from the port of the groove to the interior of the groove. A first oxidation film layer is at least formed on the side wall of the groove and above the sacrificial layer in the groove, a first part of the first oxidation film layer is formed on the side wall of the groove, and a gap is formed in the first part; the second portion is formed at the bottom of the gap and on the sacrificial layer. Forming a window on the second part, wherein the window exposes part of the sacrificial layer; and removing the sacrificial layer in the groove based on the window. And filling the gap in the first part with a second oxide film layer until the gap is completely filled with the second oxide film layer. Therefore, the preparation process of the trench isolation structure can be simplified, the preparation difficulty and cost can be reduced, and the performance of the semiconductor device can be improved.

The invention discloses a manufacturing method of a semiconductor device, relates to the technical field of semiconductors, and aims to improve the yield and the working performance of the semiconductor device. A method of manufacturing a semiconductor device includes forming a fin structure on a semiconductor substrate. The fin-shaped structure comprises sacrificial layers and channel layers which are alternately stacked; the material of at least one of the channel layer and the sacrificial layer contains germanium. And forming a mask structure crossing the periphery of a part of the fin-shaped structure. And performing selective etching on the fin-shaped structure. And removing each remaining sacrificial layer to form a first filling space. Forming a medium filling layer in the first filling space; and along the length direction of the fin-shaped structure, removing the edge parts of the two sides of the medium filling layer to form a second filling space. Forming an inner side wall in the second filling space; and the material of the inner side wall is different from that of the medium filling layer. And forming a source region and a drain region on the two sides of each residual channel layer respectively. And at least removing part of the mask structure, and removing each residual dielectric filling layer.

The embodiment of the invention provides a semiconductor structure and a forming method thereof, and the forming method of the semiconductor structure comprises the steps: providing a substrate which is provided with a plurality of discrete gate oxide layers and gate structures located above the gate oxide layers, and a groove is formed between every two adjacent gate structures; forming an interlayer dielectric layer covering the gate structure and filling the trench on the substrate, wherein the interlayer dielectric layer has a set thickness; wherein the step of forming the interlayer dielectric layer comprises the following steps of: forming a first interlayer dielectric layer which covers the gate structure and fills the groove on the substrate by adopting an ion deposition process; forming a second interlayer dielectric layer on the first interlayer dielectric layer, wherein the groove in the first interlayer dielectric layer is filled with the second interlayer dielectric layer; wherein in the normal direction of the surface of the substrate, the first interlayer dielectric layer has a first preset thickness, and the second interlayer dielectric layer has a second preset thickness. By adopting the technical scheme, the performance of the semiconductor structure can be improved.

A semiconductor structure and a method for forming the same, the method comprising: forming a groove in an initial stacked structure on both sides of a pseudo-gate structure, and the remaining initial stacked structure is used as a stacked structure; forming a sub-doping layer on a channel layer on the sidewall of the groove, and in the stacked structure, the sub-doping layers on adjacent channel layers are in contact to form an initial transition doping layer; doping ions in a partial thickness material on the surface of the initial transition doping layer, suitable for reducing the etching resistance of the initial transition doping layer; removing the initial transition doping layer doped with ions, and the remaining initial transition doping layer is used as a transition doping layer; forming a main doping layer between the transition doping layers on the opposite sidewalls of the groove, the ion doping concentration of the main doping layer is greater than the ion doping concentration of the transition doping layer, and the main doping layer is used to form a source-drain doping layer with the transition doping layer. The embodiments of the present invention improve the formation quality of the source-drain doping layer, reduce the defects inside the source-drain doping layer, and improve the performance of the semiconductor structure.

A semiconductor structure forming method comprises the steps that a substrate and a base layer structure located on the surface of the substrate are formed, and a plurality of grooves are formed in the base layer structure; a first material layer is formed on the surface of the side wall of each groove, the material of the first material layer is a two-dimensional material, the two-dimensional material is provided with a plurality of monatomic layers arranged along a first direction, the first direction is perpendicular to the surface of the side wall of the groove, the arrangement plane of each monatomic layer is parallel to the surface of the side wall of the groove, and the arrangement plane of each monatomic layer is parallel to the surface of the side wall of the groove. Each first material layer exposes the bottom surface of the groove; and removing the base layer structure between the first material layers. According to the forming method of the semiconductor structure, the forming process difficulty of the two-dimensional material structure is reduced, and the device performance and the integration degree are improved.

A semiconductor structure and a method for forming the same, the method comprising: providing a substrate, an etch stop material layer located on the substrate, a first anti-etching material layer located on the etch stop material layer, and a doping layer located on the first anti-etching material layer; using the doping layer as a mask, etching the first anti-etching material layer to form the first anti-etching layer; using the first anti-etching layer as a mask, etching the etch stop material layer to form an etch stop structure. In the process of forming the first anti-etching layer, the embodiment of the present invention uses the top of the etch stop material layer as the etch stop position, so that the bottom convex corners in the doping layer are not easily transferred to the first anti-etching layer, so that the formation quality of the first anti-etching layer is better; similarly, in the process of forming the etch stop structure, the top of the substrate is used as the etch stop position, which further reduces the influence of the bottom convex corner phenomenon on the etch stop structure, and finally the formation quality of the etch stop structure is better.

A method for forming a semiconductor structure, the method comprising: providing a substrate comprising a first region and a second region, and forming an interlayer dielectric layer having a gate opening on the substrate; forming a shielding layer covering the gate opening of the second region and exposing the gate opening of the first region, the shielding layer occupying the gate opening of the second region, so that in the step of forming a first work function material layer in the gate opening of the first region, the first work function material layer is formed on the shielding layer, and in the process of removing the shielding layer and the first work function material layer on the shielding layer, the removal process window of the first work function material layer of the second region is larger, and it is not easy to have residues, and the removal efficiency is higher, which is beneficial to improve the yield; in addition, the removal process window of the shielding layer is larger, and it is not easy to have residues, the second work function layer can better adjust the threshold voltage of the transistor of the second region, reduce the parasitic capacitance in the transistor of the second region, so that the electrical performance of the semiconductor structure is better.

The present invention belongs to the technical field of aluminum alloy processing, and provides an aluminum alloy anodizing production line and an anodizing process. The production line comprises a first water washing tank, an electrolytic tank, a second water washing tank, a dyeing tank, a high-temperature closed tank, a ash removal tank, an ultrasonic water washing tank, a drying tank, and a mounting assembly that drives the aluminum alloy to move into each tank body, which are arranged in sequence, so as to solve the technical problem in the prior art that impurities generated during the oxidation process collide with or adhere to the surface of the aluminum alloy workpiece, resulting in poor oxidation quality of the aluminum alloy workpiece. The electrolyte is driven to rotate by a stirring assembly. Since the electrolyte is in a rotating flow state, the electrolyte will drive the impurities generated by the oxidation of the aluminum alloy workpiece to move and away from the aluminum alloy workpiece. The electrolyte will pass through a rear filter plate and the impurities will be retained after contacting the filter plate, thereby intercepting impurities in the electrolyte. The present invention is widely used in operating scenarios where impurities in the liquid are prevented from damaging the workpiece.

The invention provides a flexible circuit board drying device and a coating anti-oxidation process, and belongs to the technical field of flexible circuit board production.The flexible circuit board drying device comprises a drying oven body with a discharging port and a feeding port and further comprises a water storage tank, a water squeezing unit and a drying unit; the water storage tank is fixedly connected to the rear side of the drying oven body and communicates with the feeding port. The water squeezing unit is arranged in the water storage tank, the water squeezing unit comprises a water squeezing assembly and a driving assembly connected to the water squeezing assembly, the water squeezing assembly comprises two sponge rollers which correspond to each other up and down, and the two sponge rollers which correspond to each other up and down are used for being in interference fit with a flexible circuit board; the driving assembly is used for driving the two sponge rollers which correspond to each other up and down to rotate reversely; and the drying unit is arranged in the drying oven main body and is used for removing moisture on the surface of the flexible circuit board. The drying effect is improved.

The invention discloses a high-entropy layered double hydroxide coated flame-retardant smoke suppressant as well as a preparation method and application thereof, the flame-retardant smoke suppressant is a coated flame-retardant smoke suppressant taking a smoke suppressant as a shell layer and a phosphorus flame retardant as a core, and the smoke suppressant and the phosphorus flame retardant are combined in a chemical bond manner through the bonding effect of a silane coupling agent; the smoke suppressant is a high-entropy layered double hydroxide smoke suppressant; and the silane coupling agent is gamma-aminopropyl triethoxy silane. Silanization reaction sites are introduced to the surface of the phosphorus-based flame retardant, HELDH is induced to grow in situ on the surfaces of particles, a stable coating layer is formed, and integrated fixation and synergistic release of the smoke suppression component and the flame-retardant component on the single-particle scale are achieved. In the combustion stage, the HELDH and the pyrolysis product thereof cooperate with phosphorus-based components to promote char formation and capture smoke dust / inhibit volatile matter release, so that the flame retardance, the smoke suppression property and the processing stability are synchronously improved.

The embodiment of the invention provides a forming method of a semiconductor structure, the semiconductor structure is applied to a flash memory device, and the forming method of the semiconductor structure comprises the following steps: providing a substrate; forming a first oxide layer on the substrate; forming a seed layer on the first oxide layer; forming a nitride layer on the seed layer; and forming a second oxide layer on the nitride layer. By adopting the technical scheme, the data read-write speed of the flash memory device can be improved.

The invention discloses a method for reducing pinholes in a film layer, the film layer and a photomask substrate. The method for reducing the pinholes in the film layer comprises the steps of forming a bright chromium layer by adopting a magnetron sputtering process in a specific process gas distribution mode, forming an oxide layer on the bright chromium layer and the like, has strict process parameter control, and further comprises the step of pre-treating a sputtering cavity and the like, so that the performance of the film layer is improved, and the yield of the film layer is improved. Products are prevented from being broken, sunken, white defects, sawtooth edges and other defects, and the film layer forming quality is improved. And particularly, by controlling the use ratio of CO2 in the bright chromium layer, the generation of particles in the bright chromium layer is greatly reduced, and the condition that particles on the surface of the whole plate are abnormal is avoided. The film layer produced by the method has the characteristics of low reflectivity, acid and alkali resistance, corrosion resistance, uniformity and the like, the product quality and performance of the photomask substrate with the film layer are improved, the conditions of thin film light leakage, poor product exposure and development and the like caused by pinholes are avoided, and the yield and quality reliability of the photomask substrate are improved.

The utility model provides an exhaust device, the exhaust device comprises an extrusion mechanism and a negative pressure mechanism, the extrusion mechanism is used for extruding an electrode assembly of a battery monomer, the negative pressure mechanism is communicated with a through hole of a shell, and the negative pressure mechanism is configured to be capable of extracting gas in the shell. According to the exhaust device provided by the invention, the extrusion mechanism and the negative pressure mechanism are arranged for cooperative work, the extrusion mechanism is used for extruding the gas in the electrode assembly which is not easily extracted by the negative pressure mechanism out of the electrode assembly, and the negative pressure mechanism is used for extracting the gas in the shell which cannot be extruded out of the shell by the extrusion mechanism out of the shell; the extrusion mechanism and the negative pressure mechanism work cooperatively and supplement each other, so that gas in the battery monomers can be discharged more timely and fully, the possibility of lithium precipitation of the battery monomers is reduced, and the formation quality of an SEI film of the battery monomers can be improved in the formation process. Therefore, the reliability of the produced single battery is improved.

The invention discloses a product oil ground tank interval tank capacity online correction and verification method and system, and the method comprises the steps: collecting the liquid level of a tank body and the number of oil guns, combining the oil gun error, the oil tank liquid level fluctuation, the temperature influence in the oil tank during oil unloading, the slight influence of external force on the liquid level of the oil tank in daily operation, and the like; the noise points are repeatedly removed through filtering to form a visual map, actual labeling of the noise points is completed in the map, a basic version map is formed, and a new map is formed again after two periods are changed according to the volume of the oil product; repeatedly comparing the determined noisy point set with the visual map of the original tank capacity table to remove the overlapped part, rewriting the spots of the non-overlapped part into a new temporary tank label, and carrying out the next round of verification until the determined noisy point is a suspicious point; and exporting the temporary tank capacity table to form a new formal tank capacity table so as to realize online tank capacity correction and verification. According to the method, a visual map comparison type tank calibration mode is adopted, so that the operability of a station end is improved.