Forming method of semiconductor structure

Abstract

The invention discloses a forming method of a semiconductor structure. The method comprises the following steps: providing a substrate which comprises a first region for forming a core storage circuit; orderly forming a gate electrode film and an initial hard mask film on the substrate; etching the initial hard mask film by using the first etching process, forming a first opening penetrating through the initial hard mask film in the first region; filling a sacrifice layer in the first opening; etching the sacrifice layer and the substrate at the bottom of the first opening by using the second etching process, and forming a first groove in the first region substrate; and forming a first isolation structure in the first groove. The method comprises: firstly forming the first opening penetrating through the initial hard mask film in the first region, and then filling the sacrifice layer in the first opening to form the first groove, wherien the sacrifice layer is firstly etched along the first opening and then the substrate is etched, thereby acquiring the first groove with small depth so as to reduce the depth-to-width ratio of the first groove; and the condition of forming a gap in the first isolation structure is avoided, thereby improving the forming quality of the first isolation structure, and then improving the electric property of a semiconductor device.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming a semiconductor structure. Background technique [0002] With the development trend of high-density integrated circuits, the devices that make up the circuit are placed more closely in the chip to fit the available space of the chip. Correspondingly, the density of active devices per unit area of ​​the semiconductor substrate continues to increase, so effective insulation between devices becomes more important. [0003] Shallow trench isolation (Shallow Trench Isolation, STI) technology has a good isolation effect (for example: process isolation effect and electrical isolation effect), shallow trench isolation technology also has the advantages of reducing the area occupied by the wafer surface and increasing the integration of devices . Therefore, with the reduction of the size of integrated circuits, the isolation between devices is now mainly using shallow ...

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Problems solved by technology

[0004] However, the shallow trench isolation structure of the prior art is likely to cause the reduction of the electrical performance of the semiconductor device

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