12 results about "Core Storage" patented technology

Apparatuses and methods for an integrated device with trusted execution environment (TEE) confidential computing support are disclosed. An apparatus and method for extending IO device security protocols to an integrated processor. For example, an example processor package includes: a plurality of cores to execute instructions; an interconnect structure coupled to the plurality of cores; a memory interface circuit coupled to the interconnect structure, the memory interface circuit to couple the plurality of cores to one or more memories; a root complex comprising: a security circuit operable as a root of trust (RoT) and a bridge to the interconnect structure, the security circuit for establishing secure communications with one or more root complex integrated endpoint (RCiEP) devices integrated into the processor package; and a security protocol and data model (SPDM) engine of the security circuit for providing RCiEP encryption and SPDM protocol services to establish a secure communication channel with each RCiEP device.

A storage device reduces power consumption and processes a first command in a low power mode. The storage device includes a controller to process host commands when the storage device is in a fully active state and to enter a deactivated state when the storage device enters the low power mode. An always-on processor on the storage device enters a sleep state when the storage device enters the low power mode. The always-on processor receives a notification of an incoming host command when the storage device is in the low power mode. When the always-on processor determines that the incoming command is a first command, the always-on processor processes the first command and remains in the sleep state. When the always-on processor determines the incoming command is a second command, the always-on processor may activate the controller to return the storage device to the fully active state.

The application relates to the technical field of engineering geology exploration, and discloses a 3D scanning core characteristic parameter identification system and method, which comprises a core storage module and a 3D scanning module; the method comprises the following steps: separating complete and fragmented cores by self-adaptive cleaning and separation of drilling core samples, forming a space-attribute binding initial data set; dynamically adjusting the height and levelness of a 3D laser scanner by an automatic numerical control platform, generating an optimal scanning path topology network covering all core boxes; the scanning path topology network feeds back point cloud coverage in real time, dynamically adjusts the rotation angle, and outputs a full-angle high-density core point cloud sequence; the full-angle high-density core point cloud sequence is fused by multi-scale features, and an automatic columnar chart, a quantitative parameter set and a joint parameter package are generated. Through automatic and high-precision scanning and data analysis, the application realizes digitalized collection of cores and accurate calculation of geological parameters, and improves the efficiency and quality of geological exploration.

The utility model discloses a square silicon core stack frame relates to silicon core storage equipment technical field, including base, base bottom four corners all are rotatoryly connected with universal wheel, the base top is provided with a plurality of support frame, support frame outside is provided with elevating system, the base top is provided with auxiliary cooling mechanism. The utility model discloses a square silicon core stack frame, elevating system passes through the rotation handle and drives the rotation of worm, the rotation of screw rod is driven by worm wheel engagement, and fixed block and support frame are driven by screw sleeve and lift, and the synchronous adjustment of the height of each layer support frame is realized through the telescopic cooperation of articulated frame, adapts the storage demand of different size square silicon core, and convenient to take and put operation, improves the use convenience.

The application discloses a multi-modal emotion and negotiation intention fusion strategy generation and credible evidence storage method and system, and belongs to the technical field of artificial intelligence decision and data evidence storage. The system is through cross-modal alignment fusion and two-dimensional gate depth coupling two-level architecture, the emotion-semantic joint representation and negotiation intention feature vector are deeply coupled end to end, and the emotional state becomes the core decision weight factor of strategy generation. The system adopts a cognitive lag feature multi-condition joint determination mechanism, and when the determination results of multiple characteristics conflict, the frequency of micro-expression changes is taken as the highest priority. The system supports cross-cultural negotiation adaptation and real-time risk early warning. The application first takes the AI strategy deduction process data as the core storage object, and integrates the final contract to carry out hardware-level tamper-proof solidification storage. The storage medium adopts a physically irreversible one-time programmable storage medium built in a hardware trust root module, so that a complete evidence chain that can be traced and audited is formed.

The present invention relates to a computation method for inferring a convolutional neural network implemented on a multi-core computing platform, each core comprising a local core memory of capacity 'Cm' and a computing unit, the cores being grouped into core groups, such that in a group, one core is assigned to the computations of neural operations and is connected via neighbor links to at least one immediate neighboring core.The method includes, during an inference, steps consisting of preloading a subset of operands required to perform a neural operation into the local core memories of the core groups, the local core memories of a core group defining a local group memory with a capacity 'CM' equal to the sum of the capacities 'Cm' of the local core memories of the cores belonging to the same group; and executing the neural operation by transmitting to the core groups operands complementary to the operands preloaded in the local group memory, and performing by the computing unit of said assigned computing cores the neural operation with the set of preloaded and complementary operands.

System and Method of Computation for the Inference of Convolutional Neural Networks The present invention relates to a method of computation for the inference of a convolutional neural network implemented on a multi-core computing platform, each core comprising a local core memory of capacity 'Cm' and a computing unit, the cores being grouped into groups of cores, such that in a group, one core is assigned to the computation of neural operations and is connected via neighbor links to at least one immediate neighboring core.The method includes, during inference, steps consisting of preloading a subset of operands required to perform a neural operation into the local core memories of the core groups. The local core memories of a core group define a local group memory with a capacity 'CM' equal to the sum of the capacities 'Cm' of the local core memories of the cores belonging to the same group. The neural operation is then executed by transmitting to the core groups operands complementary to the operands preloaded into the local group memory, and by performing the neural operation with the set of preloaded and complementary operands using the processing unit of said assigned processing cores. Figure 5 illustrates this in the abstract.

Embodiments of the present application provide a multi-core storage control method, an electronic device and a storage medium. The method comprises: establishing a storage link between a first core and a second core; when to-be-stored data is generated, calculating first check data of the to-be-stored data, and generating communication data based on the to-be-stored data and the first check data; writing the communication data into a shared memory of the first core and the second core through the storage link, so that the second core acquires the communication data from the shared memory through the storage link and checks the first check data; and when the first check data is checked successfully, writing the to-be-stored data into a memory of the second core. Embodiments of the present application can check storage data in a cross-core storage process, effectively guaranteeing the accuracy of the storage data.

This application discloses a method and related equipment for calculating three-dimensional sparse Fourier transform, belonging to the field of data processing technology. The method includes: receiving a data packet transmitted by the main processor in response to a three-dimensional sparse Fourier transform calculation instruction; performing a three-dimensional sparse Fourier transform calculation process based on the data packet and in conjunction with the on-chip core storage of the coprocessor to obtain the three-dimensional sparse Fourier transform calculation result; and returning the three-dimensional sparse Fourier transform calculation result to the main processor. This application, by adopting a collaborative hardware architecture design of the main processor and coprocessor, clarifies the task boundaries of different processors and effectively reduces the frequent data transfer between computation and storage units by combining the on-chip core storage of the coprocessor to perform the three-dimensional sparse Fourier transform calculation. This significantly reduces data transmission overhead, greatly shortens the computation cycle of large-scale systems, and reduces computing power consumption.

The application relates to the field of magnetic storage, in particular to a magnetic storage unit structure. The application replaces the [ferromagnetic / non-magnetic layer]n multilayer coupling structure or the ferromagnetic layer / antiferromagnetic layer structure commonly used in the current SOT-MRAM core storage unit with the exchange bias interlayer structure ferromagnetic layer / ultra-thin metal interlayer / antiferromagnetic layer structure. Through the addition of the ultra-thin metal interlayer, the ferromagnetic and antiferromagnetic interface magnetic moments can be controlled by changing the interlayer metal material and its thickness, so that the coexistence of in-plane and out-of-plane exchange bias in the exchange bias structure is realized. Meanwhile, for storage, the out-of-plane exchange bias field is used to ensure the stability of the fixed layer of the storage unit, and the in-plane exchange bias field is used as the replacement of the required in-plane lateral field, so that the low-power consumption flipping of the information storage layer is realized without increasing the lateral magnetic field providing circuit, and the purpose of reducing the overall structure complexity is achieved.

1. Name of the product in this design: Core Storage Box (2). 2. Purpose of this design: For storing rock cores. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: 3D rendering 1.

1. Name of the product in this design: Core Storage Box (1). 2. Purpose of this design: For storing rock cores. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: a 3D model.