Semiconductor structure and formation method thereof

Abstract

Disclosed are a semiconductor structure and a formation method thereof. The formation method comprises the steps of forming a base, wherein the base comprises a substrate, a gate structure positionedon the substrate, source and drain doped regions positioned in the base on the two sides of the gate structure, and an interlayer dielectric layer positioned on the base and for covering the top of the gate structure, and the substrate comprises a first region for forming a P type device and a second region for forming an N type device; forming a first contact opening for exposing the source and drain doped regions in the interlayer dielectric layer on the two sides of the gate structure; performing a P type dopant segregated schottky doping process on the source and drain doped regions exposed from the first contact opening in the first region and the second region; forming a metal silicide layer at the bottom of the first contact opening; and forming a first contact hole inserting plug in the first contact opening. By adjusting the doping concentration of the source and drain doped regions in the second region, use of a photomask can be avoided when the P type dopant segregated schottky doping process is performed, so that lowering of the process cost is realized, and the N type device suffers from relatively low influence.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, the critical dimensions of devices are getting smaller and smaller, and many problems have arisen accordingly. For example, the contact resistance between the contact hole plug and the source-drain doped region increases, which leads to a decrease in the response speed of the device, a delay in the signal, and a decrease in the driving current, thereby degrading the performance of the semiconductor device. [0003] In order to reduce the contact resistance between the contact hole plug and the source-drain doped region, a metal silicide process is introduced. The metal silicide has a lower resistivity and can significantly reduce the contact resistance, thereby increasing the driving current. [0004] With the continuo...

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[0005] Although the DSS implantation process can effectively reduc

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