Low-power power-on reset power-down reset circuit

Abstract

A power-on reset and power-down reset circuit with low power consumption belongs to the field of analog integrated circuit design. When the power supply voltage rises, the switch tube is turned on, the output voltage of the bias circuit is low, the current of the charging tube is large, and the charging capacitor is quickly charged, and the system quickly returns to normal operation; after the system power supply voltage is powered off, the power-off discharge tube is turned on Discharge, when the power supply is powered off and then rises, the output of the present invention is reversed from low level to high level, the switch tube, that is, the second PMOS tube M7 is turned on, the voltage at the output terminal of the bias circuit is low, and the current of the charging tube is large. Quickly charge the charging capacitor to generate a reset signal to the system; after the system works normally, the output of the present invention is low level, the second PMOS tube M7 is turned off, the bias circuit resistance is large, the output voltage of the bias circuit is high, and the bias circuit output voltage is high. The circuit current is set to be small, the power consumption of the circuit is reduced, and a low power consumption power-on reset power-down reset circuit is finally realized. The invention has simple process and reduces power consumption while maintaining the normal operation of the system.

Description

technical field [0001] The invention relates to the field of analog integrated circuit design, in particular to a power-on reset power-down reset circuit with low power consumption. Background technique [0002] With the rapid development of modern integrated circuits, the degree of integration is getting higher and higher, and the proportion of digital parts inside the chip is increasing. During the entire chip voltage rise process, the power supply of the digital circuit may be unstable due to fluctuations in the power supply voltage, power failure and other unstable conditions, which will lead to system instability. In order to avoid system instability caused by power failure during system voltage rise and system operation, a power-on reset power-down reset circuit is required. When the power supply voltage is unstable, the system will be disabled; when the power supply voltage is stable, the system will be enabled. . Contents of the invention [0003] In view of the ...

AI Technical Summary

Problems solved by technology

During the entire chip voltage rise process, due to the instability of the power supply voltage, such as fluctuations and power failures, the power supply of the digital circuit is unstable, which will lead to system instability.

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