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Evaluation apparatus and semiconductor device evaluation method

一种评价装置、半导体的技术，应用在单个半导体器件测试、半导体/固态器件制造、测量装置等方向，能够解决产生故障等问题，达到抑制局部放电、便利性高、抑制表面转印的效果

Active Publication Date: 2018-04-03
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As mentioned above, foreign matter or rubber traces caught during evaluation are transferred to the surface of the wafer, causing failure in the subsequent process

Method used

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  • Evaluation apparatus and semiconductor device evaluation method
  • Evaluation apparatus and semiconductor device evaluation method
  • Evaluation apparatus and semiconductor device evaluation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0033] figure 1 It is a schematic configuration diagram of the evaluation device according to the first embodiment. The chuck table 3 is a base on which the semiconductor device 5 is vacuum-adsorbed. The holding means of the semiconductor device 5 is not limited to vacuum adsorption, but may be electrostatic adsorption or the like. exist figure 1 Although one semiconductor device 5 is shown in FIG. 1 , a plurality of semiconductor devices may be placed on the chuck table 3 . The surface of the chuck table 3 is electrically connected to the evaluation unit 4 via the connection portion 8B provided on the side surface of the chuck table and the signal line 6b attached to the connection portion 8B.

[0034] The semiconductor device 5 has a vertical structure in which a large current flows in the longitudinal direction of the semiconductor device 5 , that is, in the out-of-plane direction. Electrode pads 18 are formed on the upper surface of the semiconductor device 5 , and ele...

Embodiment approach 2

[0062] Figure 7 It is a bottom view of the insulator 7 etc. which concern on Embodiment 2. The insulating portions 64 , 68 are longer than the insulating portions 62 , 66 . Both ends of the insulating portions 62 and 66 are in contact with side surfaces in the longitudinal direction of the insulating portions 64 and 68 . The insulating part 62 has a lower surface 62a and a slope 62b, the insulating part 64 has a lower surface 64a and a slope 64b, the insulating part 66 has a lower surface 66a and a slope 66b, and the insulating part 68 has a lower surface 68a and a slope 68b. The lower surfaces 62a, 64a, 66a, 68a are thinner than the inclined surfaces 62b, 64b, 66b, 68b. In addition, similarly to Embodiment 1, insulating portions 62, 64, 66, and 68 each have a front end portion and a connection portion, and inclined surfaces 62b, 64b, 66b, and 68b and lower surfaces 62a, 64a, 66a, and 68a belong to the front end portion.

[0063] During the evaluation of the semiconductor ...

Embodiment approach 3

[0065] Figure 8 It is a sectional view of insulating parts 40 , 44 and the like according to the third embodiment. When a high voltage is applied to the probe 10 , it is preferable to increase the creeping distance on the high potential side near the probe 10 . Therefore, in Embodiment 3, the outer wall surfaces of the front end parts 23 and 25 are made into inclined surfaces 23d and 25d, so that the front end parts 23 and 25 have tapered shapes. Thus, the ratio of the lower surfaces 23c, 25c to Figure 5 The lower surfaces 23a, 25a are closer to the probe 10 side. In this case, the lower surface of the insulating portion is not in contact with the outermost peripheral portion of the terminal region 20 , but is in contact with the central portion of the terminal region 20 .

[0066] The insulating parts 42 and 46 also have the same shape as the insulating parts 40 and 44 of the present embodiment. Accordingly, the contact area between the insulator 7 and the terminal regi...

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PUM

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Abstract

An object of the present invention is to provide an evaluation apparatus and a semiconductor device evaluation method that are capable of suppressing the occurrence of partial discharge during the evaluation of the electrical characteristics of a semiconductor device, and suppressing the transfer of foreign matter or rubber traces to the surface of the semiconductor device, and having high convenience. The evaluation apparatus includes an insulating plate, a plurality of probes fixed to the insulating plate, an insulating portion having a connection portion connected to the insulating plate ina detachable manner and a tip portion continuous with the connection portion, the tip portion being narrower than the connection portion, an insulator formed by combining the insulating portions to surround the plurality of probes in planar view, and an evaluation unit for passing currents through the plurality of probes to evaluate electrical characteristics of an object to be measured.

Description

technical field [0001] The present invention relates to an evaluation device used for evaluation of electrical characteristics of, for example, a semiconductor wafer or a chip obtained by singulating a semiconductor wafer, and a method of evaluating a semiconductor device using the evaluation device. Background technique [0002] When evaluating the electrical characteristics of semiconductor devices such as wafers or chips, after the lower surface of the semiconductor device is brought into contact with the surface of the chuck table by vacuum suction or the like and fixed on the surface, the probe is placed on the upper surface of the semiconductor device. Part of the set electrode contacts, and conducts electrical input and output. In inspection of a semiconductor device with a vertical structure in which a large current flows in the vertical direction of the semiconductor device, the surface of the chuck table serves as an electrode. In addition, by increasing the numbe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/26
CPCG01R31/2601G01R31/44G01R31/261H01L21/6838H01L21/68714
Inventor 冈田章山下钦也上野和起
Owner MITSUBISHI ELECTRIC CORP
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