Bonding pad structure and method of manufacturing the same

Abstract

The invention provides a bonding pad structure and a manufacturing method thereof. The bonding pad structure comprises a dielectric layer arranged on a substrate; and a bonding pad arranged on the dielectric layer. A first metal pattern layer is embedded in the dielectric layer and located right under the bonding pad. The first metal pattern layer comprises a first body portion and a plurality offirst island-shaped portions. The first body portion is provided with a plurality of first openings arranged in the central region of the first body portion and a plurality of second openings arrangedalong the periphery region of the first body portion and configured to surround the first openings. The first island-shaped portions are correspondingly arranged in the second openings and are separated from the first body portion. A plurality of first inner connection structures are arranged in the dielectric layer and correspond to the first island-shaped portions. Each first inner connection structure comprises at least one dielectric layer plug, so that the bonding pad is electrically connected to the first island-shaped portions. According to the invention, two different signals can be transmitted by utilizing the first metal pattern layer. Therefore, the mechanical strength of the bonding pad can be enhanced by filling the dielectric layer into the first openings. The bonding pad can be prevented from being damaged during the wire bonding process.

Description

technical field [0001] The present invention relates to a semiconductor technology, and in particular to a bonding pad structure and a manufacturing method thereof. Background technique [0002] In a semiconductor chip, a bonding pad is a necessary component for electrically connecting an integrated circuit in a semiconductor chip with an external circuit. Traditionally, in order to prevent the integrated circuits in the chip from being damaged, the integrated circuits are usually not disposed under the bonding pads. In this way, since the integrated circuit does not overlap with the bonding pads, the semiconductor chip needs to have a larger area to provide enough space for the bonding pads to be disposed. However, although the semiconductor industry is constantly improving the packing density of various electronic components (eg, transistors, diodes, resistors, capacitors, etc.) area to place electronic components and bonding pads. [0003] Therefore, circuit designers ...

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Problems solved by technology

[0004] However, the bond pad structure described above is not robust

For example, the via plug is easy to conduct the stress generated in the wire bonding process and damage the bonding pad structure, resulting in electrical conduction failure

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