Reference voltage buffer circuit

Abstract

The invention discloses a reference voltage buffer circuit. In one embodiment of the reference voltage buffer circuit, the reference voltage buffer circuit comprises a first bias voltage generation circuit, a second bias voltage generation circuit, a first driving element and a second driving element. The first bias voltage generation circuit is used for generating first bias voltage; the second bias voltage generation circuit is used for generating second bias voltage, and the second bias voltage is different from the first bias voltage; the first driving element is coupled to a high potential end, the first bias voltage generation circuit and a reference voltage output end, and the first driving element is used for controlling the reference voltage of the reference voltage output end according to the first bias voltage; the second driving element is coupled to the reference voltage output end, the second bias voltage generation circuit and a low potential end, and the second drivingelement is used for controlling current between the reference voltage output end and the second driving element according to the second bias voltage. By the adoption of the multiple driving elements,the capacity of current outflow and inflow is improved so that the reference voltage can be rapidly established or recovered.

Description

technical field [0001] The invention relates to a buffer circuit, in particular to a reference voltage buffer circuit. Background technique [0002] The design of the reference voltage buffer (voltage reference buffer) affects the accuracy and settling time of the reference voltage, and will affect the signal-to-noise ratio (SNR) and settling speed of a reference voltage receiving circuit. It will also affect the power consumption of the reference voltage buffer itself and the size of the circuit area. [0003] The reference voltage output end of a general reference voltage buffer has only a single driving element, so the driving capability is weak, especially the ability to sink current is weak. This type of reference voltage buffer can be found in the following literature: Wei-HsinTseng , Wei-Liang Lee, Chang-Yang Huang, and Pao-Cheng Chiu, “A 12-bit 104 MS / sSAR ADC in 28 nm CMOS for Digitally-Assisted Wireless Transmitters”, IEEE JOURNAL OF SOLID-STATE CIRCUITS. [0004...

AI Technical Summary

Problems solved by technology

[0005] As mentioned above, although some LDOs use two transistors of the same type at the voltage output terminal, one of the transistors (such as the aforementioned transistor MP D Or the discharge transistor 10) is only turned on when overvoltage occurs, and there is no function of flowing (source) current to the load terminal or sinking current from the load terminal under normal operation, so these LDOs cannot be improved by using additional transistors Drive capability

[0006] Another prior art is an inverter-type power amplifier, which includes a transistor at a high potential end, a transistor at a low potential end, a voltage input end coupled to the gate terminals of the two transistors, and a source coupled to the two transistors. An extreme voltage output terminal. Although this power amplifier uses two transistors at the voltage output terminal, the transistor at the high potential terminal is turned on when an input signal is low, and the transistor at the low potential terminal is turned on when the input signal is high. is turned on, so the two transistors are normally not turned on at the same time to provide driving, in other words, this power amplifier does not improve the driving capability

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