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SRAM (Static Random Access Memory) unit circuit and SRAM

A technology of unit circuit and voltage adjustment unit, which is applied in memory and semiconductor fields, can solve the problems of unstable state, data loss or reversal, SRAM unit data loss or reversal, etc., to improve stability and prevent data loss or reverse turn effect

Inactive Publication Date: 2018-06-29
上海矽润科技有限公司
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In order to solve the technical problem that the state of the SRAM unit is unstable in the standby state, and there is data loss or inversion, the embodiment of the present invention provides a static random access memory, which improves the stability of the SRAM unit and solves the data loss of the SRAM unit or reverse the problem

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  • SRAM (Static Random Access Memory) unit circuit and SRAM
  • SRAM (Static Random Access Memory) unit circuit and SRAM

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Embodiment Construction

[0026] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0027] The state of the existing SRAM unit in the standby state is unstable, and there is a problem of data loss or inversion. The inventors found that the reason for the above problems is that the leakage current of the NMOS transistor is relatively large, while the leakage current of the PMOS transistor is relatively small. specifically combine figure 1 As shown, during standby, the voltage of the word line WL is a high voltage, the first PMOS transistor 11 and the second PMOS transistor 12 are disconnected, the voltage of the first bit line BL and the second bit BLB is a high voltage, and the f...

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Abstract

An embodiment of the invention provides a voltage adjustment unit, which is used for decreasing the voltage of a substrate where a PMOS (Positive-channel Metal Oxide Semiconductor) transistor is located to 0.8 time of the voltage of an SRAM unit when the SRAM unit is standby; thus, the substrate where a PMOS is located can be enabled to be in a forward bias state; the formation of a leakage current in the PMOS transistor is facilitated; the leakage current can be used for compensating a leakage current in an NMOS (Negative-channel Metal Oxide Semiconductor) transistor; therefore, the problem of the data loss or inversion of a storage node, which is caused by the leakage current of the NMOS transistor can be prevented; the stability of the SRAM unit in a standby state is improved, and moreover, the voltage adjustment unit provided by the embodiment of the invention does not need to adjust the internal structure and a production method of the SRAM unit.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor technology, and in particular to the field of memory. Background technique [0002] With the continuous development of modern high-tech industries represented by electronic communication technology, the total output value of the world's integrated circuit industry is growing at a rate of more than 60% per year. As an important storage device, SRAM (Static Random Access Memory) is Widely used in the design of digital and various electronic circuit products. SRAM is an important component in analog logic circuits, and it is widely used in data storage because of its advantages of low power consumption and high reading speed. It is a memory with static access function, which can save the data stored in it without refreshing the circuit. Please refer to figure 1 A schematic diagram of the MOS layout structure of the SRAM cell of the prior art shown, the SRAM cell includes: [000...

Claims

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Application Information

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IPC IPC(8): G11C11/417
CPCG11C11/417
Inventor 李刚马松程玉华
Owner 上海矽润科技有限公司
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