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AI chip high-speed transmission architecture, AI operation board and server

A high-speed transmission and high-speed connector technology, which is applied in the direction of instruments, electrical digital data processing, etc., to achieve flexible configuration, improve the reliability of data transmission and the effect of computing and processing performance

Pending Publication Date: 2018-07-20
北京算能科技有限公司
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Problems solved by technology

[0004] However, for AI computing boards composed of multiple AI chips interconnected, the ultra-high data throughput poses a major challenge to the data transmission bandwidth of AI chips. How to improve the transmission bandwidth between chips and at the same time It also ensures the accuracy and reliability of data transmission, which has become a key issue in realizing the interconnection and communication of AI chips.

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  • AI chip high-speed transmission architecture, AI operation board and server
  • AI chip high-speed transmission architecture, AI operation board and server
  • AI chip high-speed transmission architecture, AI operation board and server

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Embodiment Construction

[0026] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0027] figure 1 It is a schematic structural diagram of an AI chip high-speed transmission architecture according to an embodiment of the present invention. like figure 1 As shown, the high-speed transmission architecture of the AI ​​chip includes a plurality of AI chips 1 and a plurality of high-speed connectors 2; connected to form a bidirectional serial interconnection architecture, one of the two SERDES interfaces is used for data communication with the upper-level AI chip, and the other is used for data communication with the lower-level AI chip.

[0028] In some embodiments, the high-speed connector is pluggable, for example, an EdgeLine CoEdge connector from MOLEX can be used.

[0029] In some implementations, t...

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Abstract

The embodiment of the invention discloses an AI chip high-speed transmission architecture, an AI operation board and a server. The AI chip high-speed transmission architecture achieves bi-directionalhigh-speed serial interconnection of multiple AI chips by means of an inter-board high-speed connector and a high-speed differential serial SERDES link. Accordingly, hardware computing power of the AIoperation board can be configured flexibly, and the data transmission reliability and operation processing property of the AI operation board are greatly improved.

Description

technical field [0001] The invention relates to chip data transmission technology, in particular to an AI chip high-speed transmission architecture, an AI computing board and a server. Background technique [0002] With the rapid development of the Internet and the information industry, all kinds of sound, image, and video data are developing in a blowout style, and big data processing has gradually replaced traditional manual data processing. Through the analysis and processing of big data, unprecedented breakthroughs can be brought about in safety management, physical health, and even discovery and innovation. The demand brought by big data analysis and processing has triggered the rapid development of artificial intelligence AI chips, and the application of artificial intelligence technology has also made big data analysis and processing capabilities leap again. [0003] Deep learning technology has triggered the rapid development of artificial intelligence applications,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42G06F13/38G06F13/40
CPCG06F13/382G06F13/4027G06F13/4221G06F13/4282
Inventor 梁思达范靖李超
Owner 北京算能科技有限公司
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