Manufacturing method of ono gate structure of sonos memory

Abstract

The invention discloses a method for manufacturing an ONO gate structure of an SONOS memory. The method comprises the following steps: step 1: sequentially forming an ONO layer superposed by a first oxide layer, a second nitride layer and a third oxide layer, a polysilicon gate and a top oxide layer on the surface of a semiconductor substrate; step 2, lithographically defining an area, and performing first time etching on the top oxide layer and the polysilicon gate stopped on the third oxide layer to form an ONO gate structure; step 3, forming a fourth oxide layer; step 4, performing comprehensive second time etching and self-alignment on the fourth oxide layer stopped on the second nitride layer to form an oxide layer sidewall; step 5, forming a fifth nitride layer; and step 6, performing comprehensive third time etching and self-alignment on the fifth nitride layer to form a nitride layer sidewall, and meanwhile removing the second nitride layer and the first oxide layer at the outside of the ONO gate structure. By adoption of the method disclosed by the invention, the stability of the ONO layer from being improved, and the process cost is low.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a method for manufacturing an ONO gate structure of a SONOS memory. Background technique [0002] As an important indicator of semiconductor devices, reliability plays a key role in the stable and reliable operation of the devices. In 95nm self-aligned (Self-Align) SONOS memory, SONOS is the abbreviation of Silicon-Oxide-Nitride-Oxide-Silicon, that is, silicon-oxide layer-nitride layer-oxide layer-silicon, and ONO is Oxide-Nitride-Oxide, that is The abbreviation of oxide layer-nitride layer-oxide layer, information is stored through the ONO layer in the SONOS memory, so the stability of the ONO layer is very important to the stability of the device, and the existing method of manufacturing the ONO gate structure is easy to cause the ONO layer to be damaged. Corresponding defects are generated by lateral etching, thereby affecting the stability of the...

AI Technical Summary

Problems solved by technology

The lateral groove located at the bottom of the polysilicon gate 103 is easy to expand in the subsequent wet etching process, which will affect the stability of the entire ONO gate structure

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